kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h, branch v7.0.11Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v7.0.112026-01-05T21:59:57+00:00drm/amdgpu: Enable support for PSP 15_0_02026-01-05T21:59:57+00:00Pratik VishwakarmaPratik.Vishwakarma@amd.com2025-11-24T04:40:21+00:00urn:sha1:9b24f63d825e771dafa137e6370c6bf44395e748
Add support for PSP v 15.0.0.
Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add psp v15.0.8 ip block v32025-12-08T18:56:31+00:00Le Male.ma@amd.com2025-11-02T10:30:58+00:00urn:sha1:c92bb14151a59715c674d421d647e37dc6cedd6e
Add psp_v15_0_8.c for MPASP 15.0.8
v2: drop memory training intf as they are only
necessary for GDDR memory
v3: Implement psp_v15_0_8_get_fw_type (Feifei)
Signed-off-by: Le Ma <le.ma@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: update psp_get_fw_type() function2025-12-08T18:56:31+00:00Feifei XuFeifei.Xu@amd.com2025-07-28T10:05:11+00:00urn:sha1:0b8c6bcd206ecd275ac6267b4feee2bcaa8f1a5f
In psp 15.0.8, mes and sdma GFX_FW_TYPE have been changed.
Define a psp common function: psp_get_fw_type().
Hide the GFX_FW_TYPE Changes in each ip's psp->funcs_get_fw_type callback.
(like psp_v15_0_8_get_fw_type()).
If no GFX_FW_TYPE change, reuse the amdgpu_psp_get_fw_type().
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add a noverbose flag to psp_wait_for2025-07-07T17:48:08+00:00Lijo Lazarlijo.lazar@amd.com2025-07-01T09:18:00+00:00urn:sha1:9888f73679b72394bcee4f2af304456f03ceed8b
For extended wait with retries on a PSP register value, add a noverbose
flag to avoid excessive error messages on each timeout.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add more checks to PSP mailbox2025-06-24T14:04:19+00:00Lijo Lazarlijo.lazar@amd.com2025-06-02T07:25:14+00:00urn:sha1:8345a71fc54b28e4d13a759c45ce2664d8540d28
Instead of checking the response flag, use status mask also to check
against any unexpected failures like a device drop. Also, log error if
waiting on a psp response fails/times out.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: reclaim psp fw reservation memory region2025-06-18T16:19:21+00:00Frank MinFrank.Min@amd.com2025-05-21T08:46:27+00:00urn:sha1:a3b7f9c306e19a5b618483c11e8af6404ff69408
PSP v14 fw update introduced changes on memory reservation region, according
to the change driver reclaim some non-reserved region.
1. introduce 2 new psp commands to query fw reservation regions
2. add a new reservation region for psp
3. reclaim psp non-used region
Signed-off-by: Frank Min <Frank.Min@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add debugfs for spirom IFWI dump2025-05-14T15:30:15+00:00Shiwu Zhangshiwu.zhang@amd.com2025-03-21T13:48:16+00:00urn:sha1:72ea78335e782d7991934e39f2a998a3d134e4fd
Expose the debugfs file node for user space to dump the IFWI image
on spirom.
For one transaction between PSP and host, it will read out the
images on both active and inactive partitions so a buffer with two
times the size of maximum IFWI image (currently 16MByte) is needed.
v2: move the vbios gfl macros to the common header and rename the
bo triplet struct to spirom_bo for this specific usage (Hawking)
v3: return directly the result of last command execution (Lijo)
Signed-off-by: Shiwu Zhang <shiwu.zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add indirect L1_TLB_CNTL reg programming for VFs2025-04-07T19:18:58+00:00Victor Skvortsovvictor.skvortsov@amd.com2025-03-27T15:38:42+00:00urn:sha1:0c6e39ce6da20104900b11bad64464a12fb47320
VFs on some IP versions are unable to access this register directly.
This register must be programmed before PSP ring is setup,
so use PSP VF mailbox directly. PSP will broadcast the register
value to all VF assigned instances.
Signed-off-by: Victor Skvortsov <victor.skvortsov@amd.com>
Reviewed-by: Zhigang Luo <Zhigang.luo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Load spdm_drv for psp v13_0_122024-12-10T15:27:23+00:00Hawking ZhangHawking.Zhang@amd.com2024-08-08T08:25:16+00:00urn:sha1:98230feb55124802832985e1d75c309f0d680f5d
spdm_drv is a firmware that needs to be loaded
in driver initialization phase.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add PSP interface for NPS switch2024-10-07T18:32:00+00:00Rajneesh Bhardwajrajneesh.bhardwaj@amd.com2024-09-19T11:52:50+00:00urn:sha1:212cc2411994c4a692c3e8c9d04592fd8b1b7108
Implement PSP ring command interface for memory partitioning on the fly
on the supported asics.
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>