<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c, branch v5.18.16</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.18.16</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.18.16'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2022-06-09T08:29:40+00:00</updated>
<entry>
<title>drm/amdgpu/psp: move PSP memory alloc from hw_init to sw_init</title>
<updated>2022-06-09T08:29:40+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-04-21T05:21:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=648befb200242cd0eaa41129544c675644ecc41d'/>
<id>urn:sha1:648befb200242cd0eaa41129544c675644ecc41d</id>
<content type='text'>
[ Upstream commit b95b5391684b39695887afb4a13cccee7820f5d6 ]

Memory allocations should be done in sw_init.  hw_init should
just be hardware programming needed to initialize the IP block.
This is how most other IP blocks work.  Move the GPU memory
allocations from psp hw_init to psp sw_init and move the memory
free to sw_fini.  This also fixes a potential GPU memory leak
if psp hw_init fails.

Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix aldebaran xgmi topology for vf</title>
<updated>2022-03-15T18:34:20+00:00</updated>
<author>
<name>Jonathan Kim</name>
<email>jonathan.kim@amd.com</email>
</author>
<published>2022-03-09T21:55:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6f172ae59a7577dbb73e2a8da18697ba8dc56341'/>
<id>urn:sha1:6f172ae59a7577dbb73e2a8da18697ba8dc56341</id>
<content type='text'>
VFs must also distinguish whether or not the TA supports full duplex or
half duplex link records in order to report the correct xGMI topology.

Signed-off-by: Jonathan Kim &lt;jonathan.kim@amd.com&gt;
Reviewed-by: Shaoyun Liu &lt;shaoyun.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add DFC CAP support for aldebaran</title>
<updated>2022-03-04T18:03:30+00:00</updated>
<author>
<name>David Yu</name>
<email>David.Yu@amd.com</email>
</author>
<published>2022-03-03T02:45:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=811c04dbb3dc43304b35688d4009117e28c1e9ce'/>
<id>urn:sha1:811c04dbb3dc43304b35688d4009117e28c1e9ce</id>
<content type='text'>
Add DFC CAP support for aldebaran

Initialize cap microcode in psp_init_sriov_microcode,
the ta microcode will be  initialized in psp_vxx_init_microcode

Signed-off-by: David Yu &lt;David.Yu@amd.com&gt;
Reviewed-by: Shaoyun.liu &lt;Shaoyun.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add support for psp 13.0.5</title>
<updated>2022-02-18T19:07:00+00:00</updated>
<author>
<name>Yifan Zhang</name>
<email>yifan1.zhang@amd.com</email>
</author>
<published>2022-02-10T19:50:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d7fd297cb0f19a87c1eab63fdb90f8ce8f03a533'/>
<id>urn:sha1:d7fd297cb0f19a87c1eab63fdb90f8ce8f03a533</id>
<content type='text'>
Enabl psp support for psp 13.0.5.

Signed-off-by: Yifan Zhang &lt;yifan1.zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/psp: Add support for MP0 13.0.8</title>
<updated>2022-02-16T22:30:03+00:00</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2021-12-23T01:52:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f99a7eb2d11b00a20c9fd6e724c60151b74b6ce9'/>
<id>urn:sha1:f99a7eb2d11b00a20c9fd6e724c60151b74b6ce9</id>
<content type='text'>
Set psp sw funcs callback and firmware loading for MP0.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: make cyan skillfish support code more consistent</title>
<updated>2022-02-16T22:30:02+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-02-14T20:44:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=dfcc3e8c24cc1fcdf9e14ef98803e295b5e4f721'/>
<id>urn:sha1:dfcc3e8c24cc1fcdf9e14ef98803e295b5e4f721</id>
<content type='text'>
Since this is an existing asic, adjust the code to follow
the same logic as previously so the driver state is consistent.

No functional change intended.

Acked-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add support for GC 10.1.4</title>
<updated>2022-02-11T21:11:55+00:00</updated>
<author>
<name>Lang Yu</name>
<email>Lang.Yu@amd.com</email>
</author>
<published>2022-02-09T06:47:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f9ed188d5a08cfacb945b21976764f57c0ea9ebd'/>
<id>urn:sha1:f9ed188d5a08cfacb945b21976764f57c0ea9ebd</id>
<content type='text'>
Add basic support for GC 10.1.4,
it uses same IP blocks with GC 10.1.3

Signed-off-by: Lang Yu &lt;Lang.Yu@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>amdgpu/amdgpu_psp: remove unneeded ret variable</title>
<updated>2022-01-18T22:43:36+00:00</updated>
<author>
<name>Minghao Chi</name>
<email>chi.minghao@zte.com.cn</email>
</author>
<published>2022-01-18T07:57:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a5e7ffa11974d90d36f818ee34fc170722ec3098'/>
<id>urn:sha1:a5e7ffa11974d90d36f818ee34fc170722ec3098</id>
<content type='text'>
Return value from amdgpu_bo_create_kernel() directly instead
of taking this in another redundant variable.

Reported-by: Zeal Robot &lt;zealci@zte.com.cn&gt;
Signed-off-by: Minghao Chi &lt;chi.minghao@zte.com.cn&gt;
Signed-off-by: CGEL ZTE &lt;cgel.zte@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: handle denied inject error into critical regions v2</title>
<updated>2022-01-18T22:22:36+00:00</updated>
<author>
<name>Stanley.Yang</name>
<email>Stanley.Yang@amd.com</email>
</author>
<published>2022-01-11T06:14:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=79c0462159a1fa3810ae1869a5fc9fd7782b6b70'/>
<id>urn:sha1:79c0462159a1fa3810ae1869a5fc9fd7782b6b70</id>
<content type='text'>
Changed from v1:
    remove unused brace

Signed-off-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add interface to load SRIOV cap FW</title>
<updated>2022-01-14T22:52:00+00:00</updated>
<author>
<name>Bokun Zhang</name>
<email>Bokun.Zhang@amd.com</email>
</author>
<published>2022-01-12T15:34:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c4381d0ee81930097e94e55d1c23f85798ffd093'/>
<id>urn:sha1:c4381d0ee81930097e94e55d1c23f85798ffd093</id>
<content type='text'>
- Add interface to load SRIOV cap FW. If the FW does not
  exist, simply skip this FW loading routine.
  This FW will only be loaded under SRIOV. Other driver
  configuration will not be affected.
  By adding this interface, it will make us easier to
  prepare SRIOV Linux guest driver for different users.

- Update sysfs interface to read cap FW version.

- Refactor PSP FW loading routine under SRIOV to use a
  unified SWITCH statement instead of using IF statement

- Remove redundant amdgpu_sriov_vf() check in FW loading
  routine

Acked-by: Monk Liu &lt;monk.liu@amd.com&gt;
Acked-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Bokun Zhang &lt;Bokun.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
