<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c, branch v5.16.18</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.16.18</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.16.18'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2022-01-27T11:02:24+00:00</updated>
<entry>
<title>drm/amd/amdgpu: fix psp tmr bo pin count leak in SRIOV</title>
<updated>2022-01-27T11:02:24+00:00</updated>
<author>
<name>Jingwen Chen</name>
<email>Jingwen.Chen2@amd.com</email>
</author>
<published>2021-12-14T03:31:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bc0a5bfbf941dba7b266d6004f83d7cf89364a8e'/>
<id>urn:sha1:bc0a5bfbf941dba7b266d6004f83d7cf89364a8e</id>
<content type='text'>
[ Upstream commit 85dfc1d692c9434c37842e610be37cd4ae4e0081 ]

[Why]
psp tmr bo will be pinned during loading amdgpu and reset in SRIOV while
only unpinned in unload amdgpu

[How]
add amdgpu_in_reset and sriov judgement to skip pin bo

v2: fix wrong judgement

Signed-off-by: Jingwen Chen &lt;Jingwen.Chen2@amd.com&gt;
Reviewed-by: Horace Chen &lt;horace.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Update TA version output in driver</title>
<updated>2021-10-28T18:26:12+00:00</updated>
<author>
<name>Candice Li</name>
<email>candice.li@amd.com</email>
</author>
<published>2021-10-21T06:52:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4320e6f86d976f86d836441c31e23ef8cfed048e'/>
<id>urn:sha1:4320e6f86d976f86d836441c31e23ef8cfed048e</id>
<content type='text'>
TA version should only be displayed in firmware version column.

Signed-off-by: Candice Li &lt;candice.li@amd.com&gt;
Reviewed-by: John Clements &lt;john.clements@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: output warning for unsupported ras error inject (v2)</title>
<updated>2021-10-19T21:32:52+00:00</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2021-10-18T09:02:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=42f88ab772a3be6e94cca559e2270f04164dc3ac'/>
<id>urn:sha1:42f88ab772a3be6e94cca559e2270f04164dc3ac</id>
<content type='text'>
Output a warning message if RAS TA returns UNSUPPORTED_ERROR_INJ status.

v2: implement it in psp_ras_ta_check_status function.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: centralize checking for RAS TA status</title>
<updated>2021-10-19T21:32:52+00:00</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2021-10-15T08:57:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1b5254e8d9322d34909cc452d76117e743432549'/>
<id>urn:sha1:1b5254e8d9322d34909cc452d76117e743432549</id>
<content type='text'>
Create new function to check status returned by RAS TA.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: load PSP RL in resume path</title>
<updated>2021-10-19T21:14:33+00:00</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2021-10-15T06:29:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c72942c167c1329f0aaa348e764f52e0aac09459'/>
<id>urn:sha1:c72942c167c1329f0aaa348e764f52e0aac09459</id>
<content type='text'>
Some registers' access will fail without PSP RL after resume.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/psp: add some missing cases to psp_check_pmfw_centralized_cstate_management</title>
<updated>2021-10-14T02:51:41+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-10-12T15:47:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=48737ac4d70faffeb516e2a9847e24f9a7eee05f'/>
<id>urn:sha1:48737ac4d70faffeb516e2a9847e24f9a7eee05f</id>
<content type='text'>
Missed a few asics.

v2: update comment

Fixes: 82d05736c47b19 ("drm/amdgpu/amdgpu_psp: convert to IP version checking")
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use adev_to_drm for consistency when accessing drm_device</title>
<updated>2021-10-08T17:22:13+00:00</updated>
<author>
<name>Guchun Chen</name>
<email>guchun.chen@amd.com</email>
</author>
<published>2021-10-08T17:21:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c58a863b1ccf638feb52cf3d9c756a9f578a57ae'/>
<id>urn:sha1:c58a863b1ccf638feb52cf3d9c756a9f578a57ae</id>
<content type='text'>
adev_to_drm is used everywhere, so improve recent changes
when accessing drm_device pointer from amdgpu_device.

Signed-off-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: convert IP version array to include instances</title>
<updated>2021-10-04T19:23:01+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-10-04T19:19:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1d789535a03679e5ce0b56a0d32a5e44596dfcdb'/>
<id>urn:sha1:1d789535a03679e5ce0b56a0d32a5e44596dfcdb</id>
<content type='text'>
Allow us to query instances versions more cleanly.

Instancing support is not consistent unfortunately. SDMA is a
good example.  Sienna cichlid has 4 total SDMA instances, each
enumerated separately (HWIDs 42, 43, 68, 69).  Arcturus has 8
total SDMA instances, but they are enumerated as multiple
instances of the same HWIDs (4x HWID 42, 4x HWID 43).  UMC
is another example.  On most chips there are multiple
instances with the same HWID.  This allows us to support both
forms.

v2: rebase
v3: clarify instancing support

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/amdgpu_psp: convert to IP version checking</title>
<updated>2021-10-04T19:23:00+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-09-16T20:36:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=82d05736c47b19ae02e91e60a0dc12f5e9b9aa69'/>
<id>urn:sha1:82d05736c47b19ae02e91e60a0dc12f5e9b9aa69</id>
<content type='text'>
Use IP versions rather than asic_type to differentiate
IP version specific features.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: set poison supported flag for RAS (v2)</title>
<updated>2021-09-28T13:30:07+00:00</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2021-09-17T10:24:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e43488493cbb46e862f83c66887f3e6cb854c6f0'/>
<id>urn:sha1:e43488493cbb46e862f83c66887f3e6cb854c6f0</id>
<content type='text'>
Add RAS poison supported flag and tell PSP RAS TA about the info.

v2: rename poison mode to poison supported, we can also disable poison
mode even we support it.
    print value of poison supported if ras feature enablement fails.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
