<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h, branch v6.12.80</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2024-05-08T19:17:06+00:00</updated>
<entry>
<title>drm/amdgpu: add nbio set_reg_remap helper</title>
<updated>2024-05-08T19:17:06+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2024-04-14T16:56:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0617cdde84621ba3309a985492136fb0c36e9303'/>
<id>urn:sha1:0617cdde84621ba3309a985492136fb0c36e9303</id>
<content type='text'>
Will be used to consolidate reg remap settings and fix HDP
flushes on systems with non-4K pages.

Reviewed-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Revert "drm/amdgpu: Add pcie usage callback to nbio"</title>
<updated>2024-02-22T15:21:27+00:00</updated>
<author>
<name>Asad Kamal</name>
<email>asad.kamal@amd.com</email>
</author>
<published>2024-02-16T08:32:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c607e76e646ef97deb4b495aca65c69ed176a070'/>
<id>urn:sha1:c607e76e646ef97deb4b495aca65c69ed176a070</id>
<content type='text'>
pcie usage is now handled by fw

This reverts commit 8d759dc6644df4141a151293cb0e77fd8ca379ed.

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add nbio callback for VPE</title>
<updated>2023-08-31T20:33:53+00:00</updated>
<author>
<name>Lang Yu</name>
<email>Lang.Yu@amd.com</email>
</author>
<published>2023-07-18T20:29:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=75fdd738ff2cedd00a7b9e1bd4db36a3e4199903'/>
<id>urn:sha1:75fdd738ff2cedd00a7b9e1bd4db36a3e4199903</id>
<content type='text'>
Add nbio callback to configure doorbell settings.

Signed-off-by: Lang Yu &lt;Lang.Yu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add pcie usage callback to nbio</title>
<updated>2023-08-09T13:46:05+00:00</updated>
<author>
<name>Asad Kamal</name>
<email>asad.kamal@amd.com</email>
</author>
<published>2023-07-28T09:58:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8d759dc6644df4141a151293cb0e77fd8ca379ed'/>
<id>urn:sha1:8d759dc6644df4141a151293cb0e77fd8ca379ed</id>
<content type='text'>
Add a callback in nbio to get pcie usage

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Shiwu Zhang &lt;shiwu.zhang@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add pcie replay count callback to nbio</title>
<updated>2023-08-07T21:14:06+00:00</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2023-07-27T09:15:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=900af4e4887ca980c8d57889e3d33e36b7586f38'/>
<id>urn:sha1:900af4e4887ca980c8d57889e3d33e36b7586f38</id>
<content type='text'>
Add a callback in nbio to get pcie replay count.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Remove unused NBIO interface</title>
<updated>2023-06-15T18:33:56+00:00</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2023-06-13T10:48:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0e41639d9a46b0285cd6381482037095f196d516'/>
<id>urn:sha1:0e41639d9a46b0285cd6381482037095f196d516</id>
<content type='text'>
Set compute partition mode interface in NBIO is no longer used. Remove
the only implementation from NBIO v7.9

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Le Ma &lt;le.ma@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Get supported memory partition modes</title>
<updated>2023-06-09T13:56:54+00:00</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2023-02-17T04:02:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0f2e1d620eca56c4ceebc041aabb1eda26b2cfd0'/>
<id>urn:sha1:0f2e1d620eca56c4ceebc041aabb1eda26b2cfd0</id>
<content type='text'>
Expand the interface to get supported memory partition modes also along
with the current memory partition mode.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Le Ma &lt;le.ma@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add initial version of XCP routines</title>
<updated>2023-06-09T13:49:31+00:00</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2022-09-16T07:13:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=75d1692393cb78b510ff18733457f91d002452f7'/>
<id>urn:sha1:75d1692393cb78b510ff18733457f91d002452f7</id>
<content type='text'>
Within a device, an accelerator core partition can be constituted with
different IP instances. These partitions are spatial in nature. Number
of partitions which can exist at the same time depends on the 'partition
mode'. Add a manager entity which is responsible for switching between
different partition modes and maintaining partitions. It is also
responsible for suspend/resume of different partitions.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: detect current GPU memory partition mode</title>
<updated>2023-06-09T13:48:42+00:00</updated>
<author>
<name>Rajneesh Bhardwaj</name>
<email>rajneesh.bhardwaj@amd.com</email>
</author>
<published>2022-04-05T17:00:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ea2d2f8ececdd4c778b66e19b82ce278dfc5e1c4'/>
<id>urn:sha1:ea2d2f8ececdd4c778b66e19b82ce278dfc5e1c4</id>
<content type='text'>
 - Add helpers to detect the current GPU memory partition.
 - Add current memory partition mode sysfs node.

Tested-by: Ori Messinger &lt;Ori.Messinger@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Rajneesh Bhardwaj &lt;rajneesh.bhardwaj@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add indirect r/w interface for smn address greater than 32bits</title>
<updated>2023-06-09T13:45:29+00:00</updated>
<author>
<name>Le Ma</name>
<email>le.ma@amd.com</email>
</author>
<published>2022-04-02T11:39:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0c552ed38780f24b7ac235c3d10c6c94686ecfdf'/>
<id>urn:sha1:0c552ed38780f24b7ac235c3d10c6c94686ecfdf</id>
<content type='text'>
On multiple AIDs platform, bit[34:32] in SMD address is leveraged to access
nonAID0 register smn address and new PCI_INDEX_HI register is introduced
to access the higher bits.

v2: rebase on latest register accessors (Alex)

Signed-off-by: Le Ma &lt;le.ma@amd.com&gt;
Acked-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
