kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h, branch v6.1.168Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.1.1682023-05-17T09:53:51+00:00drm/amd: Load MES microcode during early_init2023-05-17T09:53:51+00:00Mario Limonciellomario.limonciello@amd.com2022-12-28T07:28:40+00:00urn:sha1:3e1fa150e79897cc00db8348de267abf4c6c35be
commit cc42e76e7de5190a7da5dac9d7b2bbb458e050bf upstream.
Add an early_init phase to MES for fetching and validating microcode
from the filesystem.
If MES microcode is required but not available during early init, the
firmware framebuffer will have already been released and the screen will
freeze.
Move the request for MES microcode into the early_init phase
so that if it's not available, early_init will fail.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drm/amdgpu: remove deprecated MES version vars2023-05-17T09:53:51+00:00Graham SiderGraham.Sider@amd.com2022-10-25T18:47:05+00:00urn:sha1:369b891842228e18821e17ce5dbafc99d37d8a5d
commit 6040517e4a29d3828160c571681eec9ffe10043f upstream.
MES scheduler and kiq versions are stored in mes.sched_version and
mes.kiq_version, respectively, which are read from a register after
their queues are initialized. Remove mes.ucode_fw_version and
mes.data_fw_version which tried to read this versioning info from the
firmware headers (which don't contain this information).
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drm/amdgpu: pass queue size and is_aql_queue to MES2022-09-27T21:54:12+00:00Graham SiderGraham.Sider@amd.com2022-09-19T17:57:14+00:00urn:sha1:91ef6cfd30bf75763f41e7a4bc119883fe190606
Update mes_v11_api_def.h add_queue API with is_aql_queue parameter. Also
re-use gds_size for the queue size (unused for KFD). MES requires the
queue size in order to compute the actual wptr offset within the queue
RB since it increases monotonically for AQL queues.
v2: Make is_aql_queue assign clearer
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mes: ring aggregatged doorbell when mes queue is unmapped2022-07-13T15:25:17+00:00Le Male.ma@amd.com2020-10-30T03:26:23+00:00urn:sha1:2d7a1f71837c0922645143cc270b5a4834595544
Ring aggregated doorbel to make unmapped queue scheduled in mes firmware.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mes: init aggregated doorbell2022-07-13T15:25:17+00:00Le Male.ma@amd.com2020-10-30T03:24:07+00:00urn:sha1:0fe6906203d02d050e86b3398219df7bd9e8fe47
Allocate and enable aggregated doorbell.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mes: fix bo va unmap issue in mes2022-07-12T14:03:20+00:00Jack XiaoJack.Xiao@amd.com2020-09-09T10:32:36+00:00urn:sha1:737dad0b5d609f464cae73292de646d3d016ec73
Need reserve buffers before unmap mes ctx bo va.
v2: fix removal of dma_resv_excl_fence() (Alex)
v3: fix dma_resv_usage (Alex)
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mes: fix mes submission in atomic context2022-07-08T22:25:56+00:00Jack XiaoJack.Xiao@amd.com2022-07-07T12:57:34+00:00urn:sha1:35ba8850b673050b71b17c1421079031f4fda319
For some cases (accessing registers, unmap legacy queue), it needs
access mes in atomic context. Use spinlock to protect agaist mes
ring buffer race condition.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add common interface for mes misc op2022-06-30T19:27:57+00:00Jack XiaoJack.Xiao@amd.com2022-06-16T13:23:45+00:00urn:sha1:6a4a1f6054318cd3590562668798304b4351ef36
Add common interface for mes misc op, including accessing register
interface.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add mc wptr addr support for mes2022-06-28T15:24:05+00:00Jack XiaoJack.Xiao@amd.com2022-06-02T08:37:56+00:00urn:sha1:fe4e9ff9873758ad07e6f7b3088ae3a9dd3ff1b3
MES requires mc wptr address for usermode queues.
Export bo gart address for mc wptr address.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Update mes_v11_api_def.h2022-06-23T21:22:31+00:00Graham SiderGraham.Sider@amd.com2022-04-28T14:16:16+00:00urn:sha1:a957995618a8afe3efa2b5746c0a954bbd450882
Update MES API to support oversubscription without aggregated doorbell
for usermode queues.
v2: Change oversubscription_no_aggregated_en to is_kfd_process (align
with MES)
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>