kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c, branch v6.19.11Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.112025-10-20T22:25:41+00:00drm/amdgpu: use GPU_HDP_FLUSH for sriov2025-10-20T22:25:41+00:00Victor ZhaoVictor.Zhao@amd.com2025-10-09T02:42:48+00:00urn:sha1:6169b555db1392e79159e114fff105987231e4ce
Currently SRIOV runtime will use kiq to write HDP_MEM_FLUSH_CNTL for
hdp flush. This register need to be write from CPU for nbif to aware,
otherwise it will not work.
Implement amdgpu_kiq_hdp_flush and use kiq to do gpu hdp flush during
sriov runtime.
v2:
- fallback to amdgpu_asic_flush_hdp when amdgpu_kiq_hdp_flush failed
- add function amdgpu_mes_hdp_flush
v3:
- changed returned error
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Victor Zhao <Victor.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mes: adjust the VMID masks2025-10-13T18:14:33+00:00Alex Deucheralexander.deucher@amd.com2025-10-06T18:23:59+00:00urn:sha1:fb3c34ef49947631a4434c7157612d3c8114dfc2
The firmware limits the max vmid, but align the
settings with the hw limits as well just to be safe.
Reviewed-by: Shaoyun liu <Shaoyun.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: enable suspend/resume all for gfx 122025-10-13T18:14:28+00:00Jonathan Kimjonathan.kim@amd.com2025-06-05T14:18:37+00:00urn:sha1:277bb0f83e98261018ddd82b7ab8154bb9b93237
Suspend/resume all gangs has been available for GFX12 for a while now
so enable it.
Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: fix hung reset queue array memory allocation2025-10-13T18:14:28+00:00Jonathan Kimjonathan.kim@amd.com2025-10-09T15:28:19+00:00urn:sha1:0ef930e1faca6418316e5b9a3b4d1f6ae9e5b240
By design the MES will return an array result that is twice the number
of hung doorbells it can report.
i.e. if up k reported doorbells are supported, then the
second half of the array, also of length k, holds the HQD information
(type/queue/pipe) where queue 1 corresponds to index 0 and k,
queue 2 corresponds to index 1 and k + 1 etc ...
The driver will use the HDQ info to target queue/pipe reset for
hardware scheduled user compute queues.
Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: fix initialization of doorbell array for detect and hang2025-10-13T18:14:28+00:00Jonathan Kimjonathan.kim@amd.com2025-10-09T14:48:09+00:00urn:sha1:8745ca5efb2aad0b6591d9b8cd48573ea49c929d
Initialized doorbells should be set to invalid rather than 0 to prevent
driver from over counting hung doorbells since it checks against the
invalid value to begin with.
Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mes: add front end for detect and reset hung queue2025-09-05T21:38:31+00:00Jesse.ZhangJesse.Zhang@amd.com2025-09-04T01:39:34+00:00urn:sha1:78e1222fbf0026de99420bc35c6c12931e0f36ee
Helper function to detect and reset hung queues. MES will
return an array of doorbell indices of which queues are hung
and were optionally reset.
v2: Clear the doorbell array before detection
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Convert from DRM_* to dev_*2025-06-30T15:54:55+00:00Lijo Lazarlijo.lazar@amd.com2025-06-24T05:50:56+00:00urn:sha1:a3e510fd69c315a6b55f7a982caadee4e3ba6301
Convert from generic DRM_* to dev_* calls to have device context info.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mes: remove some unused functions2025-05-29T14:58:39+00:00Alex Deucheralexander.deucher@amd.com2025-05-19T19:51:47+00:00urn:sha1:684530526f07d488986bc34244034e54e00759a4
Nothing uses them so remove them. Leftover from
MES bring up.
Reviewed-by: Michael Chen <michael.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mes: add missing locking in helper functions2025-05-29T14:58:10+00:00Alex Deucheralexander.deucher@amd.com2025-05-19T19:46:25+00:00urn:sha1:40f970ba7a4ab77be2ffe6d50a70416c8876496a
We need to take the MES lock.
Reviewed-by: Michael Chen <michael.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drm/amdgpu/mes: use correct MES pipe for resets2025-04-30T22:16:14+00:00Alex Deucheralexander.deucher@amd.com2025-04-29T19:27:20+00:00urn:sha1:2e828a25f850f1b7bd9be61fdac07bf6901b0d08
Use the KIQ pipe for kernel queues and the SCHED pipe for
user queues.
Fixes: 2408b0272b04 ("drm/amdgpu/mes: consolidate on a single mes reset callback")
Cc: Michael Chen <Michael.Chen@amd.com>
Cc: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Michael Chen <michael.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>