kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c, branch v6.12.80Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.802025-11-13T20:34:10+00:00drm/amdgpu/jpeg: Hold pg_lock before jpeg poweroff2025-11-13T20:34:10+00:00Sathishkumar Ssathishkumar.sundararaju@amd.com2025-08-05T15:58:25+00:00urn:sha1:86ddaac6f06fc47858cca32ff30910d093fada1d
[ Upstream commit 0e7581eda8c76d1ca4cf519631a4d4eb9f82b94c ]
Acquire jpeg_pg_lock before changes to jpeg power state
and release it after power off from idle work handler.
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drm/amdgpu: Add JPEG5 support2024-02-12T21:12:00+00:00Sonny Jiangsonny.jiang@amd.com2023-08-15T20:58:24+00:00urn:sha1:dfad65c65728401587142577dd283476491bac83
Add support for JPEG5
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/jpeg: add support for jpeg DPG mode2024-02-12T21:09:32+00:00Saleemkhan Jamadarsaleemkhan.jamadar@amd.com2023-12-11T14:54:22+00:00urn:sha1:0a119d53f74a5f415196531d5622e60156e6ec7c
Jpeg DPG support for GC IP v11_5_0
Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: check RAS irq existence for VCN/JPEG2023-06-30T17:11:35+00:00Tao Zhoutao.zhou1@amd.com2023-06-21T02:30:43+00:00urn:sha1:4ff96bcc0d40b66bf3ddd6010830e9a4f9b85d53
No RAS irq is allowed.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: separate ras irq from jpeg instance irq for UVD_POISON2023-06-09T14:41:23+00:00Horatio ZhangHongkun.Zhang@amd.com2023-05-16T02:57:19+00:00urn:sha1:18dad20c3dcbd7789f3d07056cd78394c8278a75
Separate jpegbRAS poison consumption handling from the instance irq, and
register dedicated ras_poison_irq src and funcs for UVD_POISON.
v2:
- Separate ras irq from jpeg instance irq
- Improve the subject and code comments
v3:
- Split the patch into three parts
- Improve the code comments
Suggested-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Horatio Zhang <Hongkun.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Use a different value than 0xDEADBEEF for jpeg ring test2023-06-09T13:56:28+00:00Sonny Jiangsonny.jiang@amd.com2023-03-24T21:44:59+00:00urn:sha1:e7947c021a8b394677ab875288565d4dfcac779a
The 0xDEADBEEF standard anti-hang value. Use it may cause
fake pass.
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: A workaround for JPEG_v4_0_3 ring test fail2023-06-09T13:56:15+00:00Sonny Jiangsonny.jiang@amd.com2023-03-20T20:17:21+00:00urn:sha1:26dc0448ef36ba83be43a7c4da94d55ec626db1a
The jpeg_v4_0_3 jpeg_pitch register uses UVD_JRBC_SCRATCH0. It needs to
move WREG() to after jpeg_start.
Switch to a posted register write when doing the ring test to make sure
the register write lands before we test the result.
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/jpeg: add multiple jpeg rings support2023-06-09T13:41:43+00:00James ZhuJames.Zhu@amd.com2022-05-24T04:03:03+00:00urn:sha1:bc224553843e526bad4bb91188363aea1664a70d
Add multiple jpeg rings support.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/jpeg: enable jpeg v4_0 for sriov2023-03-22T04:47:59+00:00Jane JianJane.Jian@amd.com2022-07-08T10:07:38+00:00urn:sha1:bf35dbc135854c809b5cb6bcce320838c6d1370e
- skip direct jpeg registers read&write since it is not allowed
- reset Doorbell range layout for sriov
Signed-off-by: Jane Jian <Jane.Jian@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Move jpeg ras block init to ras sw_init2023-03-13T21:27:48+00:00Hawking ZhangHawking.Zhang@amd.com2023-03-11T09:28:02+00:00urn:sha1:5640e06e60198d9abdf6c618c54d982d8ec9cc0a
Initialize jpeg ras block only when jpeg ip block
supports ras features. Driver queries ras capabilities
after early_init, ras block init needs to be moved to
sw_int.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Stanley Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>