kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h, branch v6.12.80

drm/amdgpu: Fix missing drain retry fault the last entry

2025-05-29T09:02:26+00:00

[ Upstream commit fe2fa3be3d59ba67d6de54a0064441ec233cb50c ] While the entry get in svm_range_unmap_from_cpu is the last entry, and the entry is page fault, it also need to be dropped. So for equal case, it also need to be dropped. v2: Only modify the svm_range_restore_pages. Signed-off-by: Emily Deng Reviewed-by: Xiaogang Chen Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin

drm/amdgpu: Increase IH soft ring size for GFX v9.4.3 dGPU

2023-09-26T20:54:51+00:00

On GFX v9.4.3 dGPU, applications have random timeout failure when XNACK on, dmesg log has "amdgpu: IH soft ring buffer overflow 0x900, 0x900", because dGPU mode has 272 cam entries. After increasing IH soft ring to 512 entries, no more IH soft ring overflow message and application passed. Fixes: bf80d34b6c58 ("drm/amdgpu: Increase soft IH ring size") Signed-off-by: Philip Yang Reviewed-by: Christian König Reviewed-by: Felix Kuehling Signed-off-by: Alex Deucher

drm/amdgpu: Increase soft IH ring size

2023-07-12T14:57:25+00:00

Retry faults are delegated to soft IH ring and then processed by deferred worker. Current soft IH ring size PAGE_SIZE can store 128 entries, which may overflow and drop retry faults, causes HW stucks because the retry fault is not recovered. Increase soft IH ring size to 8KB, enough to store 256 CAM entries because we clear the CAM entry after handling the retry fault from soft ring. Define macro IH_RING_SIZE and IH_SW_RING_SIZE to remove duplicate constant. Show warning message if soft IH ring overflows with CAM enabled because this should not happen. Signed-off-by: Philip Yang Reviewed-by: Felix Kuehling Signed-off-by: Alex Deucher

drm/amdgpu: handle IH ring1 overflow

2021-12-01T21:03:34+00:00

IH ring1 is used to process GPU retry fault, overflow is enabled to drain retry fault because we want receive other interrupts while handling retry fault to recover range. There is no overflow flag set when wptr pass rptr. Use timestamp of rptr and wptr to handle overflow and drain retry fault. If fault timestamp goes backward, the fault is filtered and should not be processed. Drain fault is finished if processed_timestamp is equal to or larger than checkpoint timestamp. Add amdgpu_ih_functions interface decode_iv_ts for different chips to get timestamp from IV entry with different iv size and timestamp offset. amdgpu_ih_decode_iv_ts_helper is used for vega10, vega20, navi10. Signed-off-by: Philip Yang Reviewed-by: Felix Kuehling Acked-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: nuke the ih reentrant lock

2021-03-24T03:30:23+00:00

Interrupts on are non-reentrant on linux. This is just an ancient leftover from radeon where irq processing was kicked of from different places. Signed-off-by: Christian König Reviewed-by: Daniel Vetter Signed-off-by: Alex Deucher

drm/amdgpu: add ih waiter on process until checkpoint

2021-03-24T03:10:57+00:00

Add IH function to allow caller to wait until ring entries are processed until the checkpoint write pointer. This will be primarily used by HMM to drain pending page fault interrupts before memory unmap to prevent HMM from handling stale interrupts. Suggested-by: Christian König Signed-off-by: Jonathan Kim Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: add a helper function to decode iv

2020-12-23T20:05:07+00:00

since from soc15, all the chips share the same iv format. create a common helper to decode iv Signed-off-by: Hawking Zhang Acked-by: Christian König Acked-by: Felix Kuehling Reviewed-by: Dennis Li Reviewed-by: Feifei Xu Signed-off-by: Alex Deucher

drm/amdgpu: add amdgpu_ih_regs structure

2020-12-23T20:03:21+00:00

amdgpu_ih_regs holds all the registers for an ih ring Signed-off-by: Hawking Zhang Reviewed-by: Christian König Acked-by: Felix Kuehling Reviewed-by: Dennis Li Reviewed-by: Feifei Xu Signed-off-by: Alex Deucher

drm/amdgpu: add infrastructure for soft IH ring

2020-11-24T17:06:38+00:00

Add a soft IH ring implementation similar to the hardware IH1/2. This can be used if the hardware delegation of interrupts to IH1/2 doesn't work for some reason. Signed-off-by: Christian König Reviewed-by: Felix Kuehling Signed-off-by: Alex Deucher

drm/amdgpu: limit the number of IVs processed at once

2019-03-19T20:36:58+00:00

Only process a maximum of 32 IVs before writing back the RPTR. This improves hw handling when we get close to an overflow in the ring buffer. Signed-off-by: Christian König Reviewed-by: Michel Dänzer Signed-off-by: Alex Deucher