kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c, branch linux-4.13.y

drm/amdgpu: cleanup VM manager init/fini

2017-05-24T22:17:58+00:00

VM is mandatory for all hw amdgpu supports. So remove the leftovers to make it optionally. Signed-off-by: Christian König Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: return -ENODEV to user space when vram is lost v2

2017-05-24T22:11:52+00:00

below ioctl will return -ENODEV: amdgpu_cs_ioctl amdgpu_cs_wait_ioctl amdgpu_cs_wait_fences_ioctl amdgpu_gem_va_ioctl amdgpu_info_ioctl v2: only for map and replace cases in amdgpu_gem_va_ioctl Signed-off-by: Chunming Zhou Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: remove unsed amdgpu_gem_handle_lockup (v2)

2017-05-24T21:40:34+00:00

This kind of reset handling was removed a long time ago. v2: fix warning (Alex) Signed-off-by: Christian König Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: fix VM clearing in amdgpu_gem_object_close

2017-04-28T21:32:53+00:00

We need to check if the VM is swapped out before trying to update it. Fixes: 23e0563e48f7 ("drm/amdgpu: clear freed mappings immediately when BO may be freed") Signed-off-by: Christian König Reviewed-by: Nicolai Hähnle Signed-off-by: Alex Deucher

drm/amdgpu: Refuse to pin or change acceptable domains of prime BOs to VRAM. (v2)

2017-04-07T16:20:39+00:00

Migration to VRAM will break the sharing, resulting in rendering on the exporting GPU never becoming visible on the importing GPU. v2: Don't pin BOs to GTT. Instead, refuse to migrate them out of GTT. Reviewed-by: Christian König Signed-off-by: Christopher James Halse Rogers Signed-off-by: Alex Deucher

drm/amdgpu: Avoid using signed integer to store pointer value

2017-04-06T17:28:07+00:00

Signed-off-by: Alex Xie Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: clear freed mappings immediately when BO may be freed

2017-03-30T03:55:32+00:00

Also, add the fence of the clear operations to the BO to ensure that the underlying memory can only be re-used after all PTEs pointing to it have been cleared. This avoids the following sequence of events that could be triggered by user space: 1. Submit a CS that accesses some BO _without_ adding that BO to the buffer list. 2. Free that BO. 3. Some other task re-uses the memory underlying the BO. 4. The CS is submitted to the hardware and accesses memory that is now already in use by somebody else. By clearing the page tables immediately in step 2, a GPU VM fault will be triggered in step 4 instead of wild memory accesses. v2: use amdgpu_bo_fence directly Signed-off-by: Nicolai Hähnle Reviewed-by: Chunming Zhou Reviewed-by: Junwei Zhang Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: handle multi level PD updates V2

2017-03-30T03:55:27+00:00

Update all levels of the page directory. V2: a. sub level pdes always are written to incorrect place. b. sub levels need to update regardless of parent updates. Signed-off-by: Christian König (V1) Reviewed-by: Alex Deucher (V1) Signed-off-by: Chunming Zhou (V2) Acked-by: Alex Deucher (V2) Signed-off-by: Alex Deucher

drm/amdgpu: Add MTYPE flags to GPU VM IOCTL interface

2017-03-30T03:54:35+00:00

Signed-off-by: Alex Xie Reviewed-by: Alex Deucher Reviewed-by: Christian KÃ¶nig Signed-off-by: Alex Deucher

drm/amdgpu: add optional fence out-parameter to amdgpu_vm_clear_freed

2017-03-30T03:54:15+00:00

We will add the fence to freed buffer objects in a later commit, to ensure that the underlying memory can only be re-used after all references in page tables have been cleared. Signed-off-by: Nicolai Hähnle Reviewed-by: Chunming Zhou Reviewed-by: Junwei Zhang Reviewed-by: Christian König Signed-off-by: Alex Deucher