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<title>kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c, branch v4.19.252</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.19.252</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.19.252'/>
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<updated>2020-10-07T06:00:05+00:00</updated>
<entry>
<title>drm/amdgpu: restore proper ref count in amdgpu_display_crtc_set_config</title>
<updated>2020-10-07T06:00:05+00:00</updated>
<author>
<name>Jean Delvare</name>
<email>jdelvare@suse.de</email>
</author>
<published>2020-09-28T09:10:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=80f0f9b5803e1394c5bbcb7259359b3ab9d6b335'/>
<id>urn:sha1:80f0f9b5803e1394c5bbcb7259359b3ab9d6b335</id>
<content type='text'>
commit a39d0d7bdf8c21ac7645c02e9676b5cb2b804c31 upstream.

A recent attempt to fix a ref count leak in
amdgpu_display_crtc_set_config() turned out to be doing too much and
"fixed" an intended decrease as if it were a leak. Undo that part to
restore the proper balance. This is the very nature of this function
to increase or decrease the power reference count depending on the
situation.

Consequences of this bug is that the power reference would
eventually get down to 0 while the display was still in use,
resulting in that display switching off unexpectedly.

Signed-off-by: Jean Delvare &lt;jdelvare@suse.de&gt;
Fixes: e008fa6fb415 ("drm/amdgpu: fix ref count leak in amdgpu_display_crtc_set_config")
Cc: stable@vger.kernel.org
Cc: Navid Emamdoost &lt;navid.emamdoost@gmail.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/amdgpu: fix ref count leak in amdgpu_display_crtc_set_config</title>
<updated>2020-09-03T09:24:19+00:00</updated>
<author>
<name>Navid Emamdoost</name>
<email>navid.emamdoost@gmail.com</email>
</author>
<published>2020-06-14T07:09:44+00:00</published>
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<id>urn:sha1:d94a5e441cf1a7bf9f88580248fb5f8205b26c53</id>
<content type='text'>
[ Upstream commit e008fa6fb41544b63973a529b704ef342f47cc65 ]

in amdgpu_display_crtc_set_config, the call to pm_runtime_get_sync
increments the counter even in case of failure, leading to incorrect
ref count. In case of failure, decrement the ref count before returning.

Signed-off-by: Navid Emamdoost &lt;navid.emamdoost@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add amdgpu "max bpc" connector property (v2)</title>
<updated>2018-12-13T08:16:12+00:00</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2018-11-15T22:19:12+00:00</published>
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<id>urn:sha1:a0c25b4098b8de23f34f81860ddc3cbaaa159189</id>
<content type='text'>
[ Upstream commit 69756c6ff0de478c10100481f16c966dde3b5339 ]

[Why]
Many panels support more than 8bpc but some modes are unavailable while
running at greater than 8bpc due to DP/HDMI bandwidth constraints.

Support for more than 8bpc was added recently in the driver but it
defaults to the maximum supported bpc - locking out these modes.

This should be a user configurable option such that the user can select
what bpc configuration they would like.

[How]
This patch introduces the "max bpc" amdgpu driver specific connector
property so the user can limit the maximum bpc. It ranges from 8 to 16.

This doesn't directly set the preferred bpc for the panel since it
follows Intel's existing driver conventions.

This proprety should be removed once common drm support for max bpc
lands.

v2: rebase on upstream (Alex)

Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: allocate gart memory when it's required (v3)</title>
<updated>2018-07-10T19:15:58+00:00</updated>
<author>
<name>Junwei Zhang</name>
<email>Jerry.Zhang@amd.com</email>
</author>
<published>2018-06-25T05:32:24+00:00</published>
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<id>urn:sha1:bb812f1ea87dd7a4f336242212219268393ed308</id>
<content type='text'>
Instead of calling gart address space on every bo pin,
allocates it on demand

v2: fix error handling
v3: drop the change on amdgpu_amdkfd_gpuvm.c, not needed.

Signed-off-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Acked-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: separate gpu address from bo pin</title>
<updated>2018-07-10T19:15:39+00:00</updated>
<author>
<name>Junwei Zhang</name>
<email>Jerry.Zhang@amd.com</email>
</author>
<published>2018-06-25T04:51:14+00:00</published>
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<id>urn:sha1:7b7c6c81b3a370b46b0c48f4ab7ac3be83237a12</id>
<content type='text'>
It could be got by amdgpu_bo_gpu_offset() if need

Signed-off-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Reviewed-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Rename amdgpu_display_framebuffer_domains()</title>
<updated>2018-05-15T18:43:43+00:00</updated>
<author>
<name>Samuel Li</name>
<email>Samuel.Li@amd.com</email>
</author>
<published>2018-04-18T19:06:02+00:00</published>
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<id>urn:sha1:1d2361e5a6c60d7b142d19555c3e6240ffe93731</id>
<content type='text'>
It returns supported domains for display, and domains actually used are to be
decided later when pinned.

Signed-off-by: Samuel Li &lt;Samuel.Li@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move GEM BO to drm_framebuffer</title>
<updated>2018-04-11T18:07:56+00:00</updated>
<author>
<name>Daniel Stone</name>
<email>daniels@collabora.com</email>
</author>
<published>2018-03-30T14:11:38+00:00</published>
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<id>urn:sha1:e68d14dd4ebaf596bf0c237ba82f815c2f561dec</id>
<content type='text'>
Since drm_framebuffer can now store GEM objects directly, place them
there rather than in our own subclass. As this makes the framebuffer
create_handle and destroy functions the same as the GEM framebuffer
helper, we can reuse those.

Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Daniel Stone &lt;daniels@collabora.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: Christian König &lt;christian.koenig@amd.com&gt;
Cc: David (ChunMing) Zhou &lt;David1.Zhou@amd.com&gt;
Cc: amd-gfx@lists.freedesktop.org
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'drm-intel-next-2018-02-21' of git://anongit.freedesktop.org/drm/drm-intel into drm-next</title>
<updated>2018-03-01T04:07:22+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2018-03-01T04:07:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f073d78eeb8efd85718e611c15f9a78647751dea'/>
<id>urn:sha1:f073d78eeb8efd85718e611c15f9a78647751dea</id>
<content type='text'>
Driver Changes:

- Lift alpha_support protection from Cannonlake (Rodrigo)
	* Meaning the driver should mostly work for the hardware we had
	  at our disposal when testing
	* Used to be preliminary_hw_support
- Add missing Cannonlake PCI device ID of 0x5A4C (Rodrigo)
- Cannonlake port register fix (Mahesh)

- Fix Dell Venue 8 Pro black screen after modeset (Hans)
- Fix for always returning zero out-fence from execbuf (Daniele)
- Fix HDMI audio when no no relevant video output is active (Jani)
- Fix memleak of VBT data on driver_unload (Hans)

- Fix for KASAN found locking issue (Maarten)
- RCU barrier consolidation to improve igt/gem_sync/idle (Chris)
- Optimizations to IRQ handlers (Chris)
- vblank tracking improvements (64-bit resolution, PM) (Dhinakaran)
- Pipe select bit corrections (Ville)
- Reduce runtime computed device_info fields (Chris)
- Tune down some WARN_ONs to GEM_BUG_ON now that CI has good coverage (Chris)
- A bunch of kerneldoc warning fixes (Chris)

* tag 'drm-intel-next-2018-02-21' of git://anongit.freedesktop.org/drm/drm-intel: (113 commits)
  drm/i915: Update DRIVER_DATE to 20180221
  drm/i915/fbc: Use PLANE_HAS_FENCE to determine if the plane is fenced
  drm/i915/fbdev: Use the PLANE_HAS_FENCE flags from the time of pinning
  drm/i915: Move the policy for placement of the GGTT vma into the caller
  drm/i915: Also check view-&gt;type for a normal GGTT view
  drm/i915: Drop WaDoubleCursorLP3Latency:ivb
  drm/i915: Set the primary plane pipe select bits on gen4
  drm/i915: Don't set cursor pipe select bits on g4x+
  drm/i915: Assert that we don't overflow frontbuffer tracking bits
  drm/i915: Track number of pending freed objects
  drm/i915/: Initialise trans_min for skl_compute_transition_wm()
  drm/i915: Clear the in-use marker on execbuf failure
  drm/i915: Prune gen8_gt_irq_handler
  drm/i915: Track GT interrupt handling using the master iir
  drm/i915: Remove WARN_ONCE for failing to pm_runtime_if_in_use
  drm: intel_dpio_phy: fix kernel-doc comments at nested struct
  drm/i915: Release connector iterator on a digital port conflict.
  drm/i915/execlists: Remove too early assert
  drm/i915: Assert that we always complete a submission to guc/execlists
  drm: move read_domains and write_domain into i915
  ...
</content>
</entry>
<entry>
<title>drm/amdgpu: rename amdgpu_crtc_idx_to_irq_type</title>
<updated>2018-02-19T19:18:29+00:00</updated>
<author>
<name>Samuel Li</name>
<email>Samuel.Li@amd.com</email>
</author>
<published>2018-01-19T21:06:41+00:00</published>
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<id>urn:sha1:734dd01d56bfc7ecd5323c8013bb97ffbbbf18ff</id>
<content type='text'>
Add display to the name for consistency.

Signed-off-by: Samuel Li &lt;Samuel.Li@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: rename amdgpu_get_crtc_scanoutpos</title>
<updated>2018-02-19T19:18:28+00:00</updated>
<author>
<name>Samuel Li</name>
<email>Samuel.Li@amd.com</email>
</author>
<published>2018-01-19T20:53:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=aa8e286a8af9fc9534aa7ec0be8122b16cf1fd41'/>
<id>urn:sha1:aa8e286a8af9fc9534aa7ec0be8122b16cf1fd41</id>
<content type='text'>
Add display to the name for consistency.

Signed-off-by: Samuel Li &lt;Samuel.Li@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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