Linux kernel stable tree (mirror) https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.131 2026-03-04T12:20:38+00:00 2026-03-04T12:20:38+00:00 Tim Huang tim.huang@amd.com 2024-12-12T02:46:47+00:00 urn:sha1:40e0b938db37cff969fe0d4f8a52dea474dbb92e [ Upstream commit e2fd14f579b841f54a9b7162fef15234d8c0627a ] This initializes HDP IP version 6.1.1. Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Tim Huang <tim.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org> 2025-11-24T09:29:34+00:00 Alex Deucher alexander.deucher@amd.com 2025-06-27T14:25:09+00:00 urn:sha1:65240044398eb236f96225c6750a3af9e9b6617f [ Upstream commit 94bd7bf2c920998b4c756bc8a54fd3dbdf7e4360 ] Cyan skillfish uses different SMU firmware. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org> 2024-09-08T05:54:45+00:00 Jesse Zhang jesse.zhang@amd.com 2024-05-29T09:29:01+00:00 urn:sha1:54a11ce4ff2a01fc2a231c546a864883633d2b97 [ Upstream commit c09d2eff81a997c169e0cacacd6b60c5e3aa33f2 ] Potentially overflowing expression mall_size_per_umc * adev->gmc.num_umc with type unsigned int (32 bits, unsigned) is evaluated using 32-bit arithmetic,and then used in a context that expects an expression of type u64 (64 bits, unsigned). Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org> 2024-03-26T22:19:45+00:00 Srinivasan Shanmugam srinivasan.shanmugam@amd.com 2024-02-01T17:17:15+00:00 urn:sha1:8f3e68c6a3fff53c2240762a47a0045d89371775 [ Upstream commit cdb637d339572398821204a1142d8d615668f1e9 ] The issue arises when the array 'adev->vcn.vcn_config' is accessed before checking if the index 'adev->vcn.num_vcn_inst' is within the bounds of the array. The fix involves moving the bounds check before the array access. This ensures that 'adev->vcn.num_vcn_inst' is within the bounds of the array before it is used as an index. Fixes the below: drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:1289 amdgpu_discovery_reg_base_init() error: testing array offset 'adev->vcn.num_vcn_inst' after use. Fixes: a0ccc717c4ab ("drm/amdgpu/discovery: validate VCN and SDMA instances") Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org> 2023-11-28T17:20:17+00:00 Alex Deucher alexander.deucher@amd.com 2023-10-19T17:56:56+00:00 urn:sha1:e9b8533d571746d6f4e171b13c1b46e5de2cd12b commit 3938eb956e383ef88b8fc7d556492336ebee52df upstream. AMD dGPUs have integrated FW that runs as soon as the device gets power and initializes the board (determines the amount of memory, provides configuration details to the driver, etc.). For direct PCIe attached cards this happens as soon as power is applied and normally completes well before the OS has even started loading. However, with hotpluggable ports like USB4, the driver needs to wait for this to complete before initializing the device. This normally takes 60-100ms, but could take longer on some older boards periodically due to memory training. Retry for up to a second. In the non-hotplug case, there should be no change in behavior and this should complete on the first try. v2: adjust test criteria v3: adjust checks for the masks, only enable on removable devices v4: skip bif_fb_en check Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2925 Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2023-08-31T21:53:19+00:00 Le Ma le.ma@amd.com 2023-08-14T10:37:28+00:00 urn:sha1:46b55e25c94af1689636f4be1760fb0d9ddd8ae2 Several new fields are exposed in gc_info v2_1 Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Shiwu Zhang <shiwu.zhang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-31T21:53:08+00:00 Le Ma le.ma@amd.com 2023-08-14T08:27:59+00:00 urn:sha1:d4f6425a5615bbeaee1d14663205b23f82dc0313 Mall info v2 is introduced in ip discovery Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Shiwu Zhang <shiwu.zhang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-07T20:35:42+00:00 Prike Liang Prike.Liang@amd.com 2022-05-24T03:12:56+00:00 urn:sha1:4c340d0034ee1683612ef2425d3f547a50bd0509 Add to IP discovery table. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-07T20:35:27+00:00 Prike Liang Prike.Liang@amd.com 2022-05-24T03:23:16+00:00 urn:sha1:eff7a442c1f924d52ca245218e143e19311dc438 Add to IP discovery table. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-07T20:35:23+00:00 Prike Liang Prike.Liang@amd.com 2022-05-24T03:19:45+00:00 urn:sha1:9b9a5e34d4bb5d07fa22dabbc5807cc4acce839c Add to IP discovery table. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>