<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_df.h, branch v6.6.132</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.132</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.132'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2022-04-08T21:24:24+00:00</updated>
<entry>
<title>drm/amdgpu: expand cg_flags from u32 to u64</title>
<updated>2022-04-08T21:24:24+00:00</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2022-03-25T10:00:02+00:00</published>
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<id>urn:sha1:25faeddcf3c3f31f9f43de5c55f7cbdd13d3ebc7</id>
<content type='text'>
With this, we can support more CG flags.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add poison mode query for DF (v2)</title>
<updated>2021-09-28T13:30:06+00:00</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2021-09-17T10:15:23+00:00</published>
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<id>urn:sha1:ca5c636dc6a274693c5c3b4229f16e775d428b7f</id>
<content type='text'>
Add ras poison mode query interface for DF.

v2: replace RREG32_PCIE with RREG32_SOC15.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix xgmi perfmon a-b-a problem</title>
<updated>2020-10-07T18:44:16+00:00</updated>
<author>
<name>Jonathan Kim</name>
<email>jonathan.kim@amd.com</email>
</author>
<published>2020-06-18T14:40:14+00:00</published>
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<id>urn:sha1:576e0ec26b68ff4cd58d1222a5988a4d29711e2a</id>
<content type='text'>
Mapping hw counters per event config will cause ABA problems so map per
event instead.

v2: Discontinue starting perf counters if add fails.  Make it clear what's
happening with pmc_start.

Signed-off-by: Jonathan Kim &lt;jonathan.kim@amd.com&gt;
Reviewed-by: Harish Kasiviswanathan &lt;harish.kasiviswanathan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: stop resetting xgmi perfmons on disable</title>
<updated>2020-09-15T21:52:42+00:00</updated>
<author>
<name>Jonathan Kim</name>
<email>jonathan.kim@amd.com</email>
</author>
<published>2020-08-04T20:26:20+00:00</published>
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<id>urn:sha1:7c679ef6678c7718d6c7284e6f9dd8dd4c27d4e4</id>
<content type='text'>
Disabling perf events does not specify reset in ABI so stop doing it in
hardware.

Signed-off-by: Jonathan Kim &lt;Jonathan.Kim@amd.com&gt;
Reviewed-by: Harish Kasiviswanathan &lt;Harish.Kasiviswanathan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use node_id and node_size to calcualte dram_base_address</title>
<updated>2020-05-08T18:32:10+00:00</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2020-05-04T14:30:05+00:00</published>
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<id>urn:sha1:890900fe77b1321078c6d2e038e4150f06c16698</id>
<content type='text'>
physical_node_id * node_segment_size should be the
dram_base_address for current gpu node in xgmi config

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: John Clements &lt;john.clements@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: added support to get mGPU DRAM base</title>
<updated>2020-01-22T21:34:07+00:00</updated>
<author>
<name>John Clements</name>
<email>john.clements@amd.com</email>
</author>
<published>2020-01-17T04:18:00+00:00</published>
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<id>urn:sha1:a6c44d2538c469f412c3fded0de2290494d762d7</id>
<content type='text'>
resolves issue with RAS error injection in mGPU configuration

Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: John Clements &lt;john.clements@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Create generic DF struct in adev</title>
<updated>2020-01-14T15:18:41+00:00</updated>
<author>
<name>Joseph Greathouse</name>
<email>Joseph.Greathouse@amd.com</email>
</author>
<published>2020-01-14T15:05:21+00:00</published>
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<id>urn:sha1:bdf84a80e0ce5f60f4f41a27b4cf74bcfabcea56</id>
<content type='text'>
The only data fabric information the adev struct currently
contains is a function pointer table. In the near future,
we will be adding some cached DF information into adev. As
such, this patch creates a new amdgpu_df struct for adev.
Right now, it only containst the old function pointer table,
but new stuff will be added soon.

Signed-off-by: Joseph Greathouse &lt;Joseph.Greathouse@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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