<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c, branch v4.19.237</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.19.237</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.19.237'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2021-07-20T14:15:58+00:00</updated>
<entry>
<title>drm/amd/amdgpu/sriov disable all ip hw status by default</title>
<updated>2021-07-20T14:15:58+00:00</updated>
<author>
<name>Jack Zhang</name>
<email>Jack.Zhang1@amd.com</email>
</author>
<published>2021-04-27T09:08:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=38fe84738c50b248414de3c9163a217f7270cf20'/>
<id>urn:sha1:38fe84738c50b248414de3c9163a217f7270cf20</id>
<content type='text'>
[ Upstream commit 95ea3dbc4e9548d35ab6fbf67675cef8c293e2f5 ]

Disable all ip's hw status to false before any hw_init.
Only set it to true until its hw_init is executed.

The old 5.9 branch has this change but somehow the 5.11 kernrel does
not have this fix.

Without this change, sriov tdr have gfx IB test fail.

Signed-off-by: Jack Zhang &lt;Jack.Zhang1@amd.com&gt;
Review-by: Emily Deng &lt;Emily.Deng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/sriov:Correct pfvf exchange logic</title>
<updated>2019-02-20T09:25:39+00:00</updated>
<author>
<name>Emily Deng</name>
<email>Emily.Deng@amd.com</email>
</author>
<published>2018-12-29T09:46:05+00:00</published>
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<id>urn:sha1:f749f9702c9885c9fb48b78e8e74b43ecb857845</id>
<content type='text'>
[ Upstream commit b8cf66182eddb22e9c7539821ed6eecdb4f86d1a ]

The pfvf exchange need be in exclusive mode. And add pfvf exchange in gpu
reset.

Signed-off-by: Emily Deng &lt;Emily.Deng@amd.com&gt;
Reviewed-By: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move PSP init prior to IH in gpu reset</title>
<updated>2018-09-11T03:58:21+00:00</updated>
<author>
<name>Emily Deng</name>
<email>Emily.Deng@amd.com</email>
</author>
<published>2018-09-10T09:51:31+00:00</published>
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<id>urn:sha1:3a74987b24279d242d17f522f8435f1942a3c948</id>
<content type='text'>
since we use PSP to program IH regs now

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Emily Deng &lt;Emily.Deng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Revert "drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86"</title>
<updated>2018-08-21T19:32:28+00:00</updated>
<author>
<name>Leo (Sunpeng) Li</name>
<email>sunpeng.li@amd.com</email>
</author>
<published>2018-08-16T19:44:38+00:00</published>
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<id>urn:sha1:dc37a9a08d5760e405ffdd94ec6bbb6efededba6</id>
<content type='text'>
This reverts commit 8624c3c4dbfe24fc6740687236a2e196f5f4bfb0.

We need CONFIG_DRM_AMD_DC_DCN1_0 to guard code that is using fp math.

Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Signed-off-by: Leo (Sunpeng) Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'drm-next-4.19' of git://people.freedesktop.org/~agd5f/linux into drm-next</title>
<updated>2018-08-10T01:43:02+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2018-08-10T01:43:02+00:00</published>
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<id>urn:sha1:557ce95051c8eff67af48612ab350d8408aa0541</id>
<content type='text'>
More fixes for 4.19:
- Fixes for scheduler
- Fix for SR-IOV
- Fixes for display

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
From: Alex Deucher &lt;alexdeucher@gmail.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20180809200052.2777-1-alexander.deucher@amd.com
</content>
</entry>
<entry>
<title>drm/amdgpu/sriov: give 8s for recover vram under RUNTIME</title>
<updated>2018-08-09T16:59:17+00:00</updated>
<author>
<name>Emily Deng</name>
<email>Emily.Deng@amd.com</email>
</author>
<published>2018-08-09T02:03:04+00:00</published>
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<id>urn:sha1:b045d3af7d1f443dd5209a096568e0ce983127e9</id>
<content type='text'>
Extend the timeout for recovering vram bos from shadows on sr-iov
to cover the worst case scenario for timeslices and VFs

Under runtime, the wait fence time could be quite long when
other VFs are in exclusive mode. For example, for 4 VF, every
VF's exclusive timeout time is set to 3s, then the worst case is
9s. If the VF number is more than 4,then the worst case time will
be longer.
The 8s is the test data, with setting to 8s, it will pass the TDR
test for 1000 times.

SWDEV-161490

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Signed-off-by: Emily Deng &lt;Emily.Deng@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>BackMerge v4.18-rc7 into drm-next</title>
<updated>2018-07-30T00:39:22+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2018-07-30T00:39:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3fce4618279373efc59a91adb16c11da46cd69e5'/>
<id>urn:sha1:3fce4618279373efc59a91adb16c11da46cd69e5</id>
<content type='text'>
rmk requested this for armada and I think we've had a few
conflicts build up.

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move the amdgpu_fbdev_set_suspend() further up</title>
<updated>2018-07-24T20:14:54+00:00</updated>
<author>
<name>Shirish S</name>
<email>shirish.s@amd.com</email>
</author>
<published>2018-07-23T09:41:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5f8181733f6e5f8a4447f844efe4bdab5ed6a30e'/>
<id>urn:sha1:5f8181733f6e5f8a4447f844efe4bdab5ed6a30e</id>
<content type='text'>
This patch moves amdgpu_fbdev_set_suspend() to the beginning
of suspend sequence.

This is to ensure fbcon does not to write to the VRAM
after GPU is powerd down.

Signed-off-by: Shirish S &lt;shirish.s@amd.com&gt;
Reviewed-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: rework suspend and resume to deal with atomic changes</title>
<updated>2018-07-20T19:24:55+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-07-19T18:24:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=fe1053b7859dcbe830212de43befe6c7e4f089a8'/>
<id>urn:sha1:fe1053b7859dcbe830212de43befe6c7e4f089a8</id>
<content type='text'>
Use the newly split ip suspend functions to do suspend displays
first (to deal with atomic so that FBs can be unpinned before
attempting to evict vram), then evict vram, then suspend the
other IPs.  Also move the non-DC pinning code to only be
called in the non-DC cases since atomic should take care of
DC.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
Fixes: e00fb85 drm: Stop updating plane-&gt;crtc/fb/old_fb on atomic drivers
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Reviewed-and-tested-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: split ip suspend into 2 phases</title>
<updated>2018-07-20T19:24:50+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-07-19T18:10:07+00:00</published>
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<id>urn:sha1:e7854a038015122538df4777b8c192e03b4eb6c2</id>
<content type='text'>
We need to do some IPs earlier to deal with ordering issues
similar to how resume is split into two phases. Do DCE first
to deal with atomic, then do the rest.

Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Reviewed-and-tested-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
