<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c, branch v4.14.263</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.14.263</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.14.263'/>
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<updated>2021-07-20T14:17:42+00:00</updated>
<entry>
<title>drm/amd/amdgpu/sriov disable all ip hw status by default</title>
<updated>2021-07-20T14:17:42+00:00</updated>
<author>
<name>Jack Zhang</name>
<email>Jack.Zhang1@amd.com</email>
</author>
<published>2021-04-27T09:08:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=46203c865e82e93d40ac2989c43dedb8418ed71d'/>
<id>urn:sha1:46203c865e82e93d40ac2989c43dedb8418ed71d</id>
<content type='text'>
[ Upstream commit 95ea3dbc4e9548d35ab6fbf67675cef8c293e2f5 ]

Disable all ip's hw status to false before any hw_init.
Only set it to true until its hw_init is executed.

The old 5.9 branch has this change but somehow the 5.11 kernrel does
not have this fix.

Without this change, sriov tdr have gfx IB test fail.

Signed-off-by: Jack Zhang &lt;Jack.Zhang1@amd.com&gt;
Review-by: Emily Deng &lt;Emily.Deng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Avoid leaking PM domain on driver unbind (v2)</title>
<updated>2018-02-28T09:19:44+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-01-23T04:13:32+00:00</published>
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<id>urn:sha1:4517799bf6556d2cffc0dd3a0cfb53cde2ada47d</id>
<content type='text'>
commit 458d876eb869d5a88b53074c6c271b8b9adc0f07 upstream.

We only support vga_switcheroo and runtime pm on PX/HG systems
so forcing runpm to 1 doesn't do anything useful anyway.

Only call vga_switcheroo_init_domain_pm_ops() for PX/HG so
that the cleanup path is correct as well.  This mirrors what
radeon does as well.

v2: rework the patch originally sent by Lukas (Alex)

Acked-by: Lukas Wunner &lt;lukas@wunner.de&gt;
Reported-by: Lukas Wunner &lt;lukas@wunner.de&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Lukas Wunner &lt;lukas@wunner.de&gt; (v1)
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/amdgpu: fix and cleanup shadow handling</title>
<updated>2017-08-24T15:48:42+00:00</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-08-18T13:50:17+00:00</published>
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<id>urn:sha1:2e8f9fbe985e930055eb55323b8491cc668b178f</id>
<content type='text'>
Set the shadow flag on the shadow and not the parent, always bind shadow BOs
during allocation instead of manually, use the reservation_object wrappers
to grab the lock.

This fixes a couple of issues with binding the shadow BOs as well as correctly
evicting them when memory becomes tight.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add automatic per asic settings for gart_size</title>
<updated>2017-08-24T15:48:41+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-08-21T15:58:25+00:00</published>
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<id>urn:sha1:db63042b332ae048ca640b3d1aed508973c40c8c</id>
<content type='text'>
We need a larger gart for asics that do not support GPUVM on all
engines (e.g., MM) to make sure we have enough space for all
gtt buffers in physical mode.  Change the default size based on
the asic type.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: expose fragment size as module parameter (v2)</title>
<updated>2017-08-17T20:47:43+00:00</updated>
<author>
<name>Roger He</name>
<email>Hongbo.He@amd.com</email>
</author>
<published>2017-08-15T08:05:59+00:00</published>
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<id>urn:sha1:d07f14be4d11cf323977672342fb0fc6017052f6</id>
<content type='text'>
Allow overrides on the command line.

v2: agd: sqaush in spelling fix and bogus default value warning

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Roger He &lt;Hongbo.He@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use 256 bit buffers for all wb allocations (v2)</title>
<updated>2017-08-15T18:46:08+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-07-28T16:14:15+00:00</published>
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<id>urn:sha1:97407b63ea605c12f328ce46b155026080b34246</id>
<content type='text'>
May waste a bit of memory, but simplifies the interface
significantly.

v2: convert internal accounting to use 256bit slots

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: make wb 256bit function names consistent</title>
<updated>2017-08-15T18:45:59+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-07-27T19:10:50+00:00</published>
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<id>urn:sha1:eacf3e149ea64c550925b4635f854062bb535005</id>
<content type='text'>
Use a lower case b to be consistent with the other wb functions.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use amdgpu_bo_free_kernel more often</title>
<updated>2017-08-15T18:45:57+00:00</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-07-27T15:43:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=078af1a3e9d7b47f3e37ea25640023cf2e8b4d51'/>
<id>urn:sha1:078af1a3e9d7b47f3e37ea25640023cf2e8b4d51</id>
<content type='text'>
Saves us even more loc.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use amdgpu_bo_create_kernel more often</title>
<updated>2017-08-15T18:45:56+00:00</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-07-27T15:24:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a4a02777892c16d98bbcc2ea2add47950bfbf9e0'/>
<id>urn:sha1:a4a02777892c16d98bbcc2ea2add47950bfbf9e0</id>
<content type='text'>
Saves us quite a bunch of loc.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Enable uvd and vce gpu re-init for SRIOV gpu reset</title>
<updated>2017-08-15T18:45:45+00:00</updated>
<author>
<name>Frank Min</name>
<email>Frank.Min@amd.com</email>
</author>
<published>2017-06-15T12:07:36+00:00</published>
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<id>urn:sha1:257deb8cc654d365ae27948bb0a21abdbf3066ac</id>
<content type='text'>
Add uvd and vce re-init after gpu reset.

Signed-off-by: Frank Min &lt;Frank.Min@amd.com&gt;
Signed-off-by: Xiangliang.Yu &lt;Xiangliang.Yu@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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