kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h, branch v6.19.11Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.112025-03-26T21:44:41+00:00drm/amdgpu: Parse all deferred errors with UMC aca handle2025-03-26T21:44:41+00:00Xiang Liuxiang.liu@amd.com2025-03-24T09:19:54+00:00urn:sha1:aedc92be9621b31ccc90d79ee7f831944e6bfbef
We should only increase the deferred errors in UMC block.
Signed-off-by: Xiang Liu <xiang.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Decode deferred error type in gfx aca bank parser2025-03-21T16:16:35+00:00Xiang Liuxiang.liu@amd.com2025-03-19T09:02:49+00:00urn:sha1:338f7412c7ea2ce007e83c5ad7c5e01d8cfce1e1
In the case of injecting uncorrected error with background workload,
the deferred error among uncorrected errors need to be specified
by checking the deferred and poison bits of status register.
v2: refine checking for deferred error
v2: log possiable DEs among CEs
v2: generate CPER records for DEs among UEs
Signed-off-by: Xiang Liu <xiang.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Decode deferred error type in aca bank parser2025-02-27T21:50:03+00:00Xiang Liuxiang.liu@amd.com2025-02-26T03:36:55+00:00urn:sha1:00f85667faf03591666a3a447dc0d489ea9f0cb4
In the case of poison inband log, the error type need to be specified
by checking the deferred or poison bit of status register.
v2: check both deferred and poison bit
Signed-off-by: Xiang Liu <xiang.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Introduce funcs for generating cper record2025-02-17T19:09:29+00:00Hawking ZhangHawking.Zhang@amd.com2025-01-26T09:15:48+00:00urn:sha1:ad97840f954cc6834cc92324de9cde27ff0263db
Introduce new functions that are used to generate
cper ue or ce records.
v2: return -ENOMEM instead of false
v2: check return value of fill section function
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Xiang Liu <xiang.liu@amd.com>
Reviewed-by: Yang Wang <keivnyang.wang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Include ACA error type in aca bank2025-02-17T19:09:29+00:00Hawking ZhangHawking.Zhang@amd.com2025-01-26T08:32:57+00:00urn:sha1:56316ee91bcefaf535dbe8ba601cf5f14051d09a
ACA error types managed by driver a direct 1:1
correspondence with those managed by firmware.
To address this, for each ACA bank, include
both the ACA error type and the ACA SMU type.
This addition is useful for creating CPER records.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Yang Wang <keivnyang.wang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: move common ACA ipid defines into amdgpu_aca.h2024-12-10T15:26:52+00:00Yang Wangkevinyang.wang@amd.com2024-11-29T07:12:37+00:00urn:sha1:abfcf9560743937c6368ebad278603d0dab8b029
move common ACA ipid defines into amdgpu_aca.h file.
Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add new aca smu callback func parse_error_code()2024-04-17T02:39:15+00:00Yang Wangkevinyang.wang@amd.com2024-04-12T01:53:15+00:00urn:sha1:f23558627f2bb28df3b7f3d1d53b1e7f4bd1e250
add new aca smu callback parse_error_code{} to avoid specific asic check
in amdgpu_aca.c file
Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: refine function signature of amdgpu_aca_get_error_data()2024-04-10T01:50:09+00:00Yang Wangkevinyang.wang@amd.com2024-03-28T05:46:14+00:00urn:sha1:81d96e8b5a85e3ebb85342525aab02e89bec72dc
refine function signature of amdgpu_aca_get_error_data();
Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add ras event id support for ACA2024-03-22T19:48:18+00:00Yang Wangkevinyang.wang@amd.com2024-03-18T01:32:36+00:00urn:sha1:31fd330b97ba334e00ea6102dfb68565eeb7a23f
add ras event id support for ACA.
Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: avoid update aca bank multi times during ras isr2024-03-22T19:48:11+00:00Yang Wangkevinyang.wang@amd.com2024-03-03T11:01:23+00:00urn:sha1:bd15bf742f6d869998d331f01496e8ed54bcf237
Because the UE Valid MCA count will only be cleared after reset,
in order to avoid repeated counting of the error count,
the aca bank is only updated once during ras isr.
Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>