kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu.h, branch v4.17.5

drm/amdgpu: add MP1 and THM hw ip base reg offset

2018-04-11T18:14:01+00:00

Signed-off-by: Evan Quan Reviewed-by: Rex Zhu Signed-off-by: Alex Deucher

drm/amdgpu: Add support for SRBM selection v3

2018-04-03T18:08:44+00:00

Also remove code duplication in write and read regs functions. This also fixes potential missing unlock in amdgpu_debugfs_regs_write in case get_user would fail. v2: Add SRBM mutex locking. v3: Fix TO counter and fix comment location. Signed-off-by: Andrey Grodzovsky Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: Remove wrapper layer of smu ip functions

2018-03-15T14:57:50+00:00

1. delete amdgpu_powerplay.c used for wrapping smu ip functions 2. delete struct pp_instance, 3. make struct hwmgr as the smu hw handle. Reviewed-by: Alex Deucher Reviewed-by: Evan Quan Signed-off-by: Rex Zhu Signed-off-by: Alex Deucher

drm/amdgpu: move getting pcie info to common code

2018-03-14T21:01:16+00:00

No need to replicate it in several places. Reviewed-by: Rex Zhu Acked-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: explicit give BO type to amdgpu_bo_create

2018-03-14T20:08:24+00:00

Drop the "kernel" and sg parameter and give the BO type to create explicit to amdgpu_bo_create instead of figuring it out from the parameters. Signed-off-by: Christian König Reviewed-by: Roger He Signed-off-by: Alex Deucher

drm/amdgpu: implement mmio byte access helper for MB

2018-03-14T19:38:26+00:00

mailbox registers can be accessed with a byte boundry according to BIF team, so this patch prepares register byte access and will be used by following patches. Actually, for mailbox registers once the byte field is touched even not changed, the mailbox behaves, so we need the byte width accessing to those sort of regs. Signed-off-by: Monk Liu Reviewed-by: Pixel Ding Signed-off-by: Alex Deucher

drm/amdgpu: move some functions into amdgpu_ttm.h

2018-03-05T20:37:05+00:00

Those belong to the TTM handling. Signed-off-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: cleanups for vram lost handling

2018-03-01T16:52:41+00:00

1)create a routine "handle_vram_lost" to do the vram recovery, and put it into amdgpu_device_reset/reset_sriov, this way no need of the extra paramter to hold the VRAM LOST information and the related macros can be removed. 3)show vram_recover failure if time out, and set TMO equal to lockup_timeout if vram_recover is under SRIOV runtime mode. 4)report error if any ip reset failed for SR-IOV Signed-off-by: Monk Liu Acked-by: Christian König Acked-by: Andrey Grodzovsky Signed-off-by: Alex Deucher

drm/amdgpu: fix&cleanups for wb_clear

2018-02-28T19:18:03+00:00

fix: should do right shift on wb before clearing cleanups: 1,should memset all wb buffer 2,set max wb number to 128 (total 4KB) is big enough Signed-off-by: Monk Liu Acked-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: use the TTM dummy page instead of allocating one

2018-02-27T04:09:36+00:00

We have a global dummy page in TTM, use that one instead of allocating a new one. Signed-off-by: Christian König Reviewed-by: Michel Dänzer Signed-off-by: Alex Deucher