Linux kernel stable tree (mirror) https://git.radix-linux.su/kernel/linux.git/atom?h=v5.13.5 2021-04-09T20:50:52+00:00 2021-04-09T20:50:52+00:00 Hawking Zhang Hawking.Zhang@amd.com 2021-03-08T08:56:31+00:00 urn:sha1:1696bf35896b7805499c3dfe32e94ecd6a2ae08b umc_v6_7_funcs are callbacks to support umc ras functionalities in aldebaran Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2021-04-09T20:46:26+00:00 Lijo Lazar lijo.lazar@amd.com 2021-03-16T13:36:28+00:00 urn:sha1:142600e854b17f7dac25c8f971c030bb1700d2b6 v1: Aldebaran uses reset control to support mode2 reset. The sequences to reset and restore hardware context are specific to a particular configuration. v2: Clear bus mastering before reset. Fix coding style issues, drop unwanted variables and info log. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2021-04-09T20:46:08+00:00 Lijo Lazar lijo.lazar@amd.com 2021-03-16T12:19:06+00:00 urn:sha1:e071dce38f0a3acb2f6d019c6bb7933fd20d3357 v1: Add generic amdgpu_reset_control to handle different types of resets. It may be added at device, hive or ip level. Each reset control has a list of handlers associated with it to handle different types of reset. Reset control is responsible for choosing the right handler given a particular reset context. Handler objects may implement a set of functions on how to handle a particular type of reset. prepare_env = Prepare environment/software context (not used currently). prepare_hwcontext = Prepare hardware context for the reset. perform_reset = Perform the type of reset. restore_hwcontext = Restore the hw context after reset. restore_env = Restore the environment after reset (not used currently). Reset context carries the context of reset, as of now this is based on the parameters used for current set of resets. v2: Fix coding style Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2021-03-24T02:59:31+00:00 Jonathan Kim Jonathan.Kim@amd.com 2020-08-21T07:02:49+00:00 urn:sha1:16171a25d833be9c0957b759687cbda4b1ebc7db Initialization of TRAP_DATA0/1 is still required for the debugger to detect new waves on Aldebaran. Also, per-vmid global trap enablement may be required outside of debugger scope so move to init phase. v2: just add the gfx 9.4.2 changes (Alex) Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2021-03-24T02:59:28+00:00 Jonathan Kim Jonathan.Kim@amd.com 2020-09-05T15:32:59+00:00 urn:sha1:5073506c7eff55b9599ba9d5b52bf45b86a5df4f Create dedicated Aldebaran kfd2kgd callbacks to prepare for new per-vmid register instructions for debug trap setting functions and sending host traps. v2: rebase (Alex) Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com> Reviewed-by: Oak Zeng <Oak.Zeng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2021-03-24T02:55:31+00:00 Hawking Zhang Hawking.Zhang@amd.com 2020-11-18T13:14:59+00:00 urn:sha1:2fdb91a25e8b17148894be27142fcf0c03f96e7d sdma ras function is the main structure to support sdma ras on aldebaran. the patch initializes late_init late_fini callbacks. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Dennis Li<Dennis.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2021-03-24T02:52:38+00:00 Hawking Zhang Hawking.Zhang@amd.com 2020-10-23T13:46:20+00:00 urn:sha1:2e8c66d6bbb2458ff17ed1ab88866e586ef4fec2 Aldebaran will use smuio v13_0 callbacks Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2021-03-24T02:51:54+00:00 Hawking Zhang Hawking.Zhang@amd.com 2020-04-26T14:24:20+00:00 urn:sha1:742d3c61acb2c2bdeb2af9bd5c2d7a498bd9294c Initialize sos microcode for aldebaran Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2021-03-10T05:01:47+00:00 Le Ma le.ma@amd.com 2020-09-05T15:15:48+00:00 urn:sha1:f37945d50ff5194449ae1a8f53e862c2bcf43464 v1: dupilcate mmhub_v1_7.c from mmhub_v1_0.c because mmhub register address for aldebaran is different from existing asics (Le) v2: switch to latest mmhub_v9_4_2 register headers (Hawking) v3: squash in init VM_L2_CNTL3 default value for mmhub v1_7 Signed-off-by: Le Ma <le.ma@amd.com> Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2021-03-10T05:01:34+00:00 Le Ma le.ma@amd.com 2020-09-05T14:53:24+00:00 urn:sha1:42b72608ae228e8a27bb601d7344004e37bf5e7b v1: add aldebaran_reg_base_init function to initialize register base for aldebaran (Le) v2: update VCN HWIP and initialize base offset (James) Signed-off-by: Le Ma <le.ma@amd.com> Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>