<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpio/Makefile, branch linux-5.9.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-5.9.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-5.9.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2020-07-16T12:35:12+00:00</updated>
<entry>
<title>gpio: pca9570: add GPO driver for PCA9570</title>
<updated>2020-07-16T12:35:12+00:00</updated>
<author>
<name>Sungbo Eo</name>
<email>mans0n@gorani.run</email>
</author>
<published>2020-07-09T13:48:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=16d44b6085c1d90884b264deb938a34ab85a9c6d'/>
<id>urn:sha1:16d44b6085c1d90884b264deb938a34ab85a9c6d</id>
<content type='text'>
NXP PCA9570 is a 4-bit I2C GPO expander without interrupt functionality.
Its ports are controlled only by a data byte without register address.

Signed-off-by: Sungbo Eo &lt;mans0n@gorani.run&gt;
Reviewed-by: Andy Shevchenko &lt;andy.shevchenko@gmail.com&gt;
Datasheet: https://www.nxp.com/docs/en/data-sheet/PCA9570.pdf
Link: https://lore.kernel.org/r/20200709134829.216393-1-mans0n@gorani.run
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>gpiolib: split character device into gpiolib-cdev</title>
<updated>2020-06-20T20:38:37+00:00</updated>
<author>
<name>Kent Gibson</name>
<email>warthog618@gmail.com</email>
</author>
<published>2020-06-16T09:36:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=925ca36913fc7dfee9d0bb7f36d81dd108a7b80f'/>
<id>urn:sha1:925ca36913fc7dfee9d0bb7f36d81dd108a7b80f</id>
<content type='text'>
Split the cdev specific functionality out of gpiolib.c and into
gpiolib-cdev.c. This improves the readability and maintainability of both
the cdev and core gpiolib code.

Suggested-by: Bartosz Golaszewski &lt;bgolaszewski@baylibre.com&gt;
Signed-off-by: Kent Gibson &lt;warthog618@gmail.com&gt;
Link: https://lore.kernel.org/r/20200616093615.5167-1-warthog618@gmail.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>gpio: add a reusable generic gpio_chip using regmap</title>
<updated>2020-06-03T08:48:37+00:00</updated>
<author>
<name>Michael Walle</name>
<email>michael@walle.cc</email>
</author>
<published>2020-05-28T14:58:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ebe363197e525ffbd279c729421f6f6c24d8d681'/>
<id>urn:sha1:ebe363197e525ffbd279c729421f6f6c24d8d681</id>
<content type='text'>
There are quite a lot simple GPIO controller which are using regmap to
access the hardware. This driver tries to be a base to unify existing
code into one place. This won't cover everything but it should be a good
starting point.

It does not implement its own irq_chip because there is already a
generic one for regmap based devices. Instead, the irq_chip will be
instantiated in the parent driver and its irq domain will be associate
to this driver.

For now it consists of the usual registers, like set (and an optional
clear) data register, an input register and direction registers.
Out-of-the-box, it supports consecutive register mappings and mappings
where the registers have gaps between them with a linear mapping between
GPIO offset and bit position. For weirder mappings the user can register
its own .xlate().

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Reviewed-by: Andy Shevchenko &lt;andy.shevchenko@gmail.com&gt;
Link: https://lore.kernel.org/r/20200528145845.31436-3-michael@walle.cc
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>gpio: Add GPIO Aggregator</title>
<updated>2020-05-18T08:12:42+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2020-05-11T14:52:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=828546e24280f721350a7a0dcc92416e917b4382'/>
<id>urn:sha1:828546e24280f721350a7a0dcc92416e917b4382</id>
<content type='text'>
GPIO controllers are exported to userspace using /dev/gpiochip*
character devices.  Access control to these devices is provided by
standard UNIX file system permissions, on an all-or-nothing basis:
either a GPIO controller is accessible for a user, or it is not.
Currently no mechanism exists to control access to individual GPIOs.

Hence add a GPIO driver to aggregate existing GPIOs, and expose them as
a new gpiochip.

This supports the following use cases:
  - Aggregating GPIOs using Sysfs
    This is useful for implementing access control, and assigning a set
    of GPIOs to a specific user or virtual machine.
  - Generic GPIO Driver
    This is useful for industrial control, where it can provide
    userspace access to a simple GPIO-operated device described in DT,
    cfr. e.g. spidev for SPI-operated devices.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Tested-by: Eugeniu Rosca &lt;erosca@de.adit-jv.com&gt;
Reviewed-by: Eugeniu Rosca &lt;erosca@de.adit-jv.com&gt;
Link: https://lore.kernel.org/r/20200511145257.22970-5-geert+renesas@glider.be
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>gpio: add driver for Mellanox BlueField 2 GPIO controller</title>
<updated>2020-03-09T08:47:50+00:00</updated>
<author>
<name>Asmaa Mnebhi</name>
<email>Asmaa@mellanox.com</email>
</author>
<published>2020-03-02T21:04:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bc0ae0e737f5167348579612493e2754e2122dfb'/>
<id>urn:sha1:bc0ae0e737f5167348579612493e2754e2122dfb</id>
<content type='text'>
This patch adds support for the GPIO controller used by
Mellanox BlueField 2 SOCs.

Signed-off-by: Asmaa Mnebhi &lt;Asmaa@mellanox.com&gt;
Link: https://lore.kernel.org/r/1680de9eb6d2b8855228dde9a2dd065f0dcbe1fb.1583182325.git.Asmaa@mellanox.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'mfd-next-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd</title>
<updated>2020-02-03T14:51:57+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-02-03T14:51:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=af32f3a414d340b0ab92e88ffb80a19632ff345e'/>
<id>urn:sha1:af32f3a414d340b0ab92e88ffb80a19632ff345e</id>
<content type='text'>
Pull MFD updates from Lee Jones:
 "New Drivers:
   - Add support for ROHM BD71828 PMICs and GPIOs
   - Add support for Qualcomm Aqstic Audio Codecs WCD9340 and WCD9341

  New Device Support:
   - Add support for BD71828 to BD70528 RTC driver
   - Add support for Intel's Jasper Lake to LPSS PCI

  New Functionality:
   - Add support for Power Key to ROHM BD71828
   - Add support for Clocks to ROHM BD71828
   - Add support for GPIOs to Dialog DA9062
   - Add support for USB PD Notify to ChromiumOS EC
   - Allow callers to specify args when requesting regmap lookup; syscon

  Fix-ups:
   - Improve error handling and sanity checking; atmel-hlcdc, dln2
   - Device Tree support/documentation; bd71828, da9062, xylon,logicvc,
     ab8500, max14577, atmel-usart
   - Match devices using platform IDs; bd7xxxx
   - Refactor BD718x7 regulator component; bd718x7-regulator
   - Use standard interfaces/helpers; syscon, sm501
   - Trivial (whitespace, spelling, etc); ab8500-core, Kconfig
   - Remove unused code; db8500-prcmu, tqmx86
   - Wait until boot has finished before accessing registers;
     madera-core
   - Provide missing register value defaults; cs47l15-tables
   - Allow more time for hardware to reset; madera-core

  Bug Fixes:
   - Fix erroneous register values; rohm-bd70528
   - Fix register volatility; axp20x, rn5t618
   - Fix Kconfig dependencies; MFD_MAX77650
   - Fix incorrect compatible string; da9062-core
   - Fix syscon_regmap_lookup_by_phandle_args() stub; syscon"

* tag 'mfd-next-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (41 commits)
  mfd: syscon: Fix syscon_regmap_lookup_by_phandle_args() dummy
  mfd: wcd934x: Add support to wcd9340/wcd9341 codec
  mfd: syscon: Add arguments support for syscon reference
  mfd: rn5t618: Mark ADC control register volatile
  dt-bindings: atmel-usart: Add microchip,sam9x60-{usart, dbgu}
  dt-bindings: atmel-usart: Remove wildcard
  mfd: cros_ec: Add cros-usbpd-notify subdevice
  mfd: da9062: Fix watchdog compatible string
  mfd: madera: Allow more time for hardware reset
  mfd: cs47l15: Add missing register default
  mfd: madera: Wait for boot done before accessing any other registers
  mfd: Kconfig: Rename Samsung to lowercase
  mfd: tqmx86: remove set but not used variable 'i2c_ien'
  mfd: dbx500-prcmu: Drop DSI pll clock functions
  mfd: dbx500-prcmu: Drop set_display_clocks()
  mfd: max77650: Select REGMAP_IRQ in Kconfig
  mfd: axp20x: Mark AXP20X_VBUS_IPSOUT_MGMT as volatile
  mfd: ab8500: Fix ab8500-clk typo
  mfd: intel-lpss: Add Intel Jasper Lake PCI IDs
  dt-bindings: mfd: max14577: Add reference to max14040_battery.txt descriptions
  ...
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2020-01-29T17:51:36+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-01-29T17:51:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6ba3d7066c71d2103da255df19eb613d299bab15'/>
<id>urn:sha1:6ba3d7066c71d2103da255df19eb613d299bab15</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes, nothing too exciting about
  this.

  Some changes hit arch/sh and arch/arm but are well isolated and
  acknowledged by the respective arch maintainers.

  Core changes:

   - Dropped the chained IRQ setup callback into GPIOLIB as we got rid
     of the last users of that in this changeset.

  New drivers:

   - New driver for Ingenic X1830.

   - New driver for Freescale i.MX8MP.

  Driver enhancements:

   - Fix all remaining Intel drivers to pass their IRQ chips along with
     the GPIO chips.

   - Intel Baytrail allocates its irqchip dynamically.

   - Intel Lynxpoint is thoroughly rewritten and modernized.

   - Aspeed AST2600 pin muxing and configuration is much improved.

   - Qualcomm SC7180 functions are updated and wakeup interrupt map is
     provided.

   - A whole slew of Renesas SH-PFC cleanups and improvements.

   - Fix up the Intel DT bindings to use the generic YAML DT bindings
     schema (a first user of this)"

* tag 'pinctrl-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (99 commits)
  pinctrl: madera: Remove extra blank line
  pinctrl: qcom: Don't lock around irq_set_irq_wake()
  pinctrl: mvebu: armada-37xx: use use platform api
  gpio: Drop the chained IRQ handler assign function
  pinctrl: freescale: Add i.MX8MP pinctrl driver support
  dt-bindings: imx: Add pinctrl binding doc for i.MX8MP
  pinctrl: tigerlake: Tiger Lake uses _HID enumeration
  pinctrl: sunrisepoint: Add Coffee Lake-S ACPI ID
  pinctrl: iproc: Use platform_get_irq_optional() to avoid error message
  pinctrl: dt-bindings: Fix some errors in the lgm and pinmux schema
  pinctrl: intel: Pass irqchip when adding gpiochip
  pinctrl: intel: Add GPIO &lt;-&gt; pin mapping ranges via callback
  pinctrl: baytrail: Replace WARN with dev_info_once when setting direct-irq pin to output
  pinctrl: baytrail: Do not clear IRQ flags on direct-irq enabled pins
  pinctrl: sunrisepoint: Add missing Interrupt Status register offset
  pinctrl: sh-pfc: Split R-Car H3 support in two independent drivers
  pinctrl: artpec6: fix __iomem on reg in set
  pinctrl: ingenic: Use devm_platform_ioremap_resource()
  pinctrl: ingenic: Factorize irq_set_type function
  pinctrl: ingenic: Remove duplicated ingenic_chip_info structures
  ...
</content>
</entry>
<entry>
<title>Merge tag 'gpio-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio</title>
<updated>2020-01-29T17:43:39+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-01-29T17:43:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=fa889d85551e0bd962fdefe1cc113f9ba1d04a36'/>
<id>urn:sha1:fa889d85551e0bd962fdefe1cc113f9ba1d04a36</id>
<content type='text'>
Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v5.6 kernel cycle.

  This is a pretty calm cycle so far, nothing special going on really.
  Some more changes will come in from the irqchip and pin control trees.

  I also deleted an orphan include file for FMC that was dangling since
  subsystem was removed.

  Core changes:

   - Document the usecases for the kernelspace vs userspace handling of
     GPIOs.

   - Handle MSI (message signalled interrupts) properly in the core
     hierarchical irqdomain code.

   - Fix a rare race condition while initializing the descriptor array.

  New drivers:

   - Xylon LogiCVC GPIO driver.

   - WDC934x GPIO controller driver.

  Driver improvements:

   - Implemented suspend/resume in the Tegra driver.

   - MPC8xx edge detection fixup.

   - Properly convert ThunderX to use hierarchical irqdomain with
     GPIOLIB_IRQCHIP on top of the revert of the previous buggy
     switchover. This time it works (hopefully).

  Misc:

   - Drop a FMC remnant file &lt;linux/ipmi-fru.h&gt;

   - A slew of fixes"

* tag 'gpio-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (48 commits)
  MAINTAINERS: Replace Tien Hock Loh as Altera PIO maintainer
  gpiolib: hold gpio devices lock until -&gt;descs array is initialised
  gpio: aspeed-sgpio: fixed typos
  gpio: mvebu: clear irq in edge cause register before unmask edge irq
  gpiolib: Lower verbosity when allocating hierarchy irq
  gpiolib: Remove duplicated function gpio_do_set_config()
  gpio: Fix the no return statement warning
  gpio: wcd934x: Add support to wcd934x gpio controller
  gpiolib: remove set but not used variable 'config'
  gpio: vx855: fixed a typo
  gpio: mockup: sort headers alphabetically
  gpio: mockup: update the license tag
  gpio: Remove the unused flags
  gpiolib: Set lockdep class for hierarchical irq domains
  gpio: thunderx: Switch to GPIOLIB_IRQCHIP
  gpiolib: Add the support for the msi parent domain
  gpiolib: Add support for the irqdomain which doesn't use irq_fwspec as arg
  gpio: Add use guidance documentation
  dt-bindings: gpio: wcd934x: Add bindings for gpio
  gpio: altera: change to platform_get_irq_optional to avoid false-positive error
  ...
</content>
</entry>
<entry>
<title>gpio: bd71828: Initial support for ROHM BD71828 PMIC GPIOs</title>
<updated>2020-01-24T07:23:10+00:00</updated>
<author>
<name>Matti Vaittinen</name>
<email>matti.vaittinen@fi.rohmeurope.com</email>
</author>
<published>2020-01-20T13:47:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c31f625d06c9166f753a2f21ac9c3f859647ca9f'/>
<id>urn:sha1:c31f625d06c9166f753a2f21ac9c3f859647ca9f</id>
<content type='text'>
ROHM BD71828 PMIC contains 4 pins which can be configured by OTP
to be used for general purposes. First 3 can be used as outputs
and 4.th pin can be used as input. Allow them to be controlled
via GPIO framework.

The driver assumes all of the pins are configured as GPIOs and
trusts that the reserved pins in other OTP configurations are
excluded from control using "gpio-reserved-ranges" device tree
property (or left untouched by GPIO users).

Typical use for 4.th pin (input) is to use it as HALL sensor
input so that this pin state is toggled when HALL sensor detects
LID position change (from close to open or open to close). PMIC
HW implements some extra logic which allows PMIC to power-up the
system when this pin is toggled. Please see the data sheet for
details of GPIO options which can be selected by OTP settings.

Signed-off-by: Matti Vaittinen &lt;matti.vaittinen@fi.rohmeurope.com&gt;
Reviewed-by: Bartosz Golaszewski &lt;bgolaszewski@baylibre.com&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
</content>
</entry>
<entry>
<title>gpio/sifive: Add GPIO driver for SiFive SoCs</title>
<updated>2020-01-20T19:10:03+00:00</updated>
<author>
<name>Yash Shah</name>
<email>yash.shah@sifive.com</email>
</author>
<published>2019-12-10T11:11:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=96868dce644d002383f6d5eb575a6ce3c8779f39'/>
<id>urn:sha1:96868dce644d002383f6d5eb575a6ce3c8779f39</id>
<content type='text'>
Adds the GPIO driver for SiFive RISC-V SoCs.

Signed-off-by: Wesley W. Terpstra &lt;wesley@sifive.com&gt;
[Atish: Various fixes and code cleanup]
Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Signed-off-by: Yash Shah &lt;yash.shah@sifive.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Reviewed-by: Bartosz Golaszewski &lt;bgolaszewski@baylibre.com&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Link: https://lore.kernel.org/r/1575976274-13487-6-git-send-email-yash.shah@sifive.com
</content>
</entry>
</feed>
