kernel/linux.git/drivers/fpga, branch v6.6.39

fpga: region: add owner module and take its refcount

2024-06-12T09:12:23+00:00

[ Upstream commit b7c0e1ecee403a43abc89eb3e75672b01ff2ece9 ] The current implementation of the fpga region assumes that the low-level module registers a driver for the parent device and uses its owner pointer to take the module's refcount. This approach is problematic since it can lead to a null pointer dereference while attempting to get the region during programming if the parent device does not have a driver. To address this problem, add a module owner pointer to the fpga_region struct and use it to take the module's refcount. Modify the functions for registering a region to take an additional owner module parameter and rename them to avoid conflicts. Use the old function names for helper macros that automatically set the module that registers the region as the owner. This ensures compatibility with existing low-level control modules and reduces the chances of registering a region without setting the owner. Also, update the documentation to keep it consistent with the new interface for registering an fpga region. Fixes: 0fa20cdfcc1f ("fpga: fpga-region: device tree control for FPGA") Suggested-by: Greg Kroah-Hartman Suggested-by: Xu Yilun Reviewed-by: Russ Weight Signed-off-by: Marco Pagani Acked-by: Xu Yilun Link: https://lore.kernel.org/r/20240419083601.77403-1-marpagan@redhat.com Signed-off-by: Xu Yilun Signed-off-by: Sasha Levin

fpga: bridge: add owner module and take its refcount

2024-06-12T09:12:14+00:00

[ Upstream commit 1da11f822042eb6ef4b6064dc048f157a7852529 ] The current implementation of the fpga bridge assumes that the low-level module registers a driver for the parent device and uses its owner pointer to take the module's refcount. This approach is problematic since it can lead to a null pointer dereference while attempting to get the bridge if the parent device does not have a driver. To address this problem, add a module owner pointer to the fpga_bridge struct and use it to take the module's refcount. Modify the function for registering a bridge to take an additional owner module parameter and rename it to avoid conflicts. Use the old function name for a helper macro that automatically sets the module that registers the bridge as the owner. This ensures compatibility with existing low-level control modules and reduces the chances of registering a bridge without setting the owner. Also, update the documentation to keep it consistent with the new interface for registering an fpga bridge. Other changes: opportunistically move put_device() from __fpga_bridge_get() to fpga_bridge_get() and of_fpga_bridge_get() to improve code clarity since the bridge device is taken in these functions. Fixes: 21aeda950c5f ("fpga: add fpga bridge framework") Suggested-by: Greg Kroah-Hartman Suggested-by: Xu Yilun Reviewed-by: Russ Weight Signed-off-by: Marco Pagani Acked-by: Xu Yilun Link: https://lore.kernel.org/r/20240322171839.233864-1-marpagan@redhat.com Signed-off-by: Xu Yilun Signed-off-by: Sasha Levin

fpga: manager: add owner module and take its refcount

2024-06-12T09:12:14+00:00

[ Upstream commit 4d4d2d4346857bf778fafaa97d6f76bb1663e3c9 ] The current implementation of the fpga manager assumes that the low-level module registers a driver for the parent device and uses its owner pointer to take the module's refcount. This approach is problematic since it can lead to a null pointer dereference while attempting to get the manager if the parent device does not have a driver. To address this problem, add a module owner pointer to the fpga_manager struct and use it to take the module's refcount. Modify the functions for registering the manager to take an additional owner module parameter and rename them to avoid conflicts. Use the old function names for helper macros that automatically set the module that registers the manager as the owner. This ensures compatibility with existing low-level control modules and reduces the chances of registering a manager without setting the owner. Also, update the documentation to keep it consistent with the new interface for registering an fpga manager. Other changes: opportunistically move put_device() from __fpga_mgr_get() to fpga_mgr_get() and of_fpga_mgr_get() to improve code clarity since the manager device is taken in these functions. Fixes: 654ba4cc0f3e ("fpga manager: ensure lifetime with of_fpga_mgr_get") Suggested-by: Greg Kroah-Hartman Suggested-by: Xu Yilun Signed-off-by: Marco Pagani Acked-by: Xu Yilun Link: https://lore.kernel.org/r/20240305192926.84886-1-marpagan@redhat.com Signed-off-by: Xu Yilun Signed-off-by: Sasha Levin

fpga: dfl-pci: add PCI subdevice ID for Intel D5005 card

2024-06-12T09:11:27+00:00

[ Upstream commit bb1dbeceb1c20cfd81271e1bd69892ebd1ee38e0 ] Add PCI subdevice ID for the Intel D5005 Stratix 10 FPGA card as used with the Open FPGA Stack (OFS) FPGA Interface Manager (FIM). Unlike the Intel D5005 PAC FIM which exposed a separate PCI device ID, the OFS FIM reuses the same device ID for all DFL-based FPGA cards and differentiates on the subdevice ID. The subdevice ID values were chosen as the numeric part of the FPGA card names in hexadecimal. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Acked-by: Xu Yilun Link: https://lore.kernel.org/r/20240422230257.1959-1-peter.colberg@intel.com Signed-off-by: Xu Yilun Signed-off-by: Sasha Levin

fpga: Fix memory leak for fpga_region_test_class_find()

2023-10-24T17:32:39+00:00

fpga_region_class_find() in fpga_region_test_class_find() will call get_device() if the data is matched, which will increment refcount for dev->kobj, so it should call put_device() to decrement refcount for dev->kobj to free the region, because fpga_region_unregister() will call fpga_region_dev_release() only when the refcount for dev->kobj is zero but fpga_region_test_init() call device_register() in fpga_region_register_full(), which also increment refcount. So call put_device() after calling fpga_region_class_find() in fpga_region_test_class_find(). After applying this patch, the following memory leak is never detected. unreferenced object 0xffff88810c8ef000 (size 1024): comm "kunit_try_catch", pid 1875, jiffies 4294715298 (age 836.836s) hex dump (first 32 bytes): b8 d1 fb 05 81 88 ff ff 08 f0 8e 0c 81 88 ff ff ................ 08 f0 8e 0c 81 88 ff ff 00 00 00 00 00 00 00 00 ................ backtrace: [] kmalloc_trace+0x27/0xa0 [] fpga_region_register_full+0x51/0x430 [fpga_region] [] 0xffffffffa0228e47 [] kunit_try_run_case+0xdd/0x250 [] kunit_generic_run_threadfn_adapter+0x4a/0x90 [] kthread+0x2b5/0x380 [] ret_from_fork+0x2d/0x70 [] ret_from_fork_asm+0x11/0x20 unreferenced object 0xffff888105fbd1b8 (size 8): comm "kunit_try_catch", pid 1875, jiffies 4294715298 (age 836.836s) hex dump (first 8 bytes): 72 65 67 69 6f 6e 30 00 region0. backtrace: [] __kmalloc_node_track_caller+0x53/0x150 [] kvasprintf+0xb0/0x130 [] kobject_set_name_vargs+0x41/0x110 [] dev_set_name+0xab/0xe0 [] fpga_region_register_full+0x312/0x430 [fpga_region] [] 0xffffffffa0228e47 [] kunit_try_run_case+0xdd/0x250 [] kunit_generic_run_threadfn_adapter+0x4a/0x90 [] kthread+0x2b5/0x380 [] ret_from_fork+0x2d/0x70 [] ret_from_fork_asm+0x11/0x20 unreferenced object 0xffff88810b3b8a00 (size 256): comm "kunit_try_catch", pid 1875, jiffies 4294715298 (age 836.836s) hex dump (first 32 bytes): 00 00 00 00 00 00 00 00 08 8a 3b 0b 81 88 ff ff ..........;..... 08 8a 3b 0b 81 88 ff ff e0 ac 04 83 ff ff ff ff ..;............. backtrace: [] kmalloc_trace+0x27/0xa0 [] device_add+0xa2a/0x15e0 [] fpga_region_register_full+0x321/0x430 [fpga_region] [] 0xffffffffa0228e47 [] kunit_try_run_case+0xdd/0x250 [] kunit_generic_run_threadfn_adapter+0x4a/0x90 [] kthread+0x2b5/0x380 [] ret_from_fork+0x2d/0x70 [] ret_from_fork_asm+0x11/0x20 Fixes: 64a5f972c93d ("fpga: add an initial KUnit suite for the FPGA Region") Signed-off-by: Jinjie Ruan Reviewed-by: Marco Pagani Acked-by: Xu Yilun Link: https://lore.kernel.org/r/20231007094321.3447084-1-ruanjinjie@huawei.com [yilun.xu@intel.com: slightly changes the commit message] Signed-off-by: Xu Yilun Link: https://lore.kernel.org/r/20231023032857.902699-3-yilun.xu@linux.intel.com Signed-off-by: Greg Kroah-Hartman

fpga: disable KUnit test suites when module support is enabled

2023-10-21T10:31:25+00:00

The fpga core currently assumes that all manager, bridge, and region devices have a parent device associated with a driver that can be used to take the module's refcount. This behavior causes the fpga test suites to crash with a null-ptr-deref since parent fake devices do not have a driver. This patch disables all fpga KUnit test suites when loadable module support is enabled until the fpga core is fixed. Test suites can still be run using the KUnit default UML kernel. Signed-off-by: Marco Pagani Acked-by: Xu Yilun Fixes: ccbc1c302115 ("fpga: add an initial KUnit suite for the FPGA Manager") Link: https://lore.kernel.org/r/20231018163814.100803-1-marpagan@redhat.com Signed-off-by: Greg Kroah-Hartman

fpga: region: make fpga_region_class a static const structure

2023-08-11T15:04:21+00:00

Now that the driver core allows for struct class to be in read-only memory, move the fpga_region_class structure to be declared at build time placing it into read-only memory, instead of having to be dynamically allocated at boot time. Suggested-by: Greg Kroah-Hartman Signed-off-by: Ivan Orlov Acked-by: Xu Yilun Link: https://lore.kernel.org/r/20230811073043.52808-3-ivan.orlov0322@gmail.com Signed-off-by: Xu Yilun

fpga: fpga-mgr: make fpga_mgr_class a static const structure

2023-08-11T15:04:03+00:00

Now that the driver core allows for struct class to be in read-only memory, move the fpga_mgr_class structure to be declared at build time placing it into read-only memory, instead of having to be dynamically allocated at boot time. Suggested-by: Greg Kroah-Hartman Signed-off-by: Ivan Orlov Acked-by: Xu Yilun Link: https://lore.kernel.org/r/20230811073043.52808-2-ivan.orlov0322@gmail.com Signed-off-by: Xu Yilun

fpga: bridge: make fpga_bridge_class a static const structure

2023-08-11T15:03:37+00:00

Now that the driver core allows for struct class to be in read-only memory, move the fpga_bridge_class structure to be declared at build time placing it into read-only memory, instead of having to be dynamically allocated at boot time. Suggested-by: Greg Kroah-Hartman Signed-off-by: Ivan Orlov Acked-by: Xu Yilun Link: https://lore.kernel.org/r/20230811073043.52808-1-ivan.orlov0322@gmail.com Signed-off-by: Xu Yilun

fpga: dfl-pci: Use pci_find_vsec_capability() to simplify the code

2023-08-07T10:21:40+00:00

PCI core add pci_find_vsec_capability() to query VSEC. We can use that core API to simplify the code. Signed-off-by: Xiongfeng Wang Acked-by: Xu Yilun Link: https://lore.kernel.org/r/20230802080726.178194-1-wangxiongfeng2@huawei.com Signed-off-by: Xu Yilun