kernel/linux.git/drivers/edac/mce_amd.c, branch v6.12.91

x86/cpu/amd: Provide a separate accessor for Node ID

2024-02-15T21:07:37+00:00

AMD (ab)uses topology_die_id() to store the Node ID information and topology_max_dies_per_pkg to store the number of nodes per package. This collides with the proper processor die level enumeration which is coming on AMD with CPUID 8000_0026, unless there is a correlation between the two. There is zero documentation about that. So provide new storage and new accessors which for now still access die_id and topology_max_die_per_pkg(). Will be mopped up after AMD and HYGON are converted over. Signed-off-by: Thomas Gleixner Tested-by: Juergen Gross Tested-by: Sohil Mehta Tested-by: Michael Kelley Tested-by: Zhang Rui Tested-by: Wang Wendy Tested-by: K Prateek Nayak Link: https://lore.kernel.org/r/20240212153624.956116738@linutronix.de

EDAC/mce_amd: Remove SMCA Extended Error code descriptions

2023-11-28T14:17:09+00:00

On AMD systems with Scalable MCA each machine check error of a SMCA bank type has an associated bit position in the bank's control (CTL) register. An error's bit position in the CTL register is used during error decoding for offsetting into the corresponding bank's error description structure. As new errors are being added in newer AMD systems for existing SMCA bank types, the underlying SMCA architecture guarantees that the bit positions of existing errors are not altered. However, on some AMD systems some of the existing bit definitions in the CTL register of SMCA bank type are reassigned without defining new HWID and McaType. Consequently, the errors whose bit definitions have been reassigned in the CTL register are being erroneously decoded. Remove SMCA Extended Error Code descriptions, this avoids decoding issues for incorrectly reassigned bits, and avoids the related maintenance burden in the kernel. But the bank type and Extended Error Code value for an error will continue to be printed as a convenience. The decoding of SMCA Extended Error Code description can be done by referring to AMD documentation or use external tools such as rasdaemon. Offline decoding can be done using below option in rasdaemon. For example: $ rasdaemon -p --status --ipid --smca Also, the user can pass particular family and model to decode the error string. $ rasdaemon -p --status --ipid --smca --family --model --bank Refer to the rasdaemon commit for details: https://github.com/mchehab/rasdaemon/commit/932118b04a04104dfac6b8536 Signed-off-by: Muralidhara M K Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Yazen Ghannam Link: https://lore.kernel.org/r/20231102114225.2006878-2-muralimk@amd.com

x86/mce/amd, EDAC/mce_amd: Move long names to decoder module

2023-11-27T11:16:51+00:00

The long names of the SMCA banks are only used by the MCE decoder module. Move them out of the arch code and into the decoder module. [ bp: Name the long names array "smca_long_names", drop local ptr in decode_smca_error(), constify arrays. ] Signed-off-by: Yazen Ghannam Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/20231118193248.1296798-5-yazen.ghannam@amd.com

x86/MCE/AMD, EDAC/mce_amd: Decode UMC_V2 ECC errors

2023-06-05T10:27:11+00:00

The MI200 (Aldebaran) series of devices introduced a new SMCA bank type for Unified Memory Controllers. The MCE subsystem already has support for this new type. The MCE decoder module will decode the common MCA error information for the new bank type, but it will not pass the information to the AMD64 EDAC module for detailed memory error decoding. Have the MCE decoder module recognize the new bank type as an SMCA UMC memory error and pass the MCA information to AMD64 EDAC. Signed-off-by: Yazen Ghannam Co-developed-by: Muralidhara M K Signed-off-by: Muralidhara M K Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/20230515113537.1052146-3-muralimk@amd.com

x86/MCE/AMD, EDAC/mce_amd: Support non-uniform MCA bank type enumeration

2021-12-22T16:22:09+00:00

AMD systems currently lay out MCA bank types such that the type of bank number "i" is either the same across all CPUs or is Reserved/Read-as-Zero. For example: Bank # | CPUx | CPUy 0 LS LS 1 RAZ UMC 2 CS CS 3 SMU RAZ Future AMD systems will lay out MCA bank types such that the type of bank number "i" may be different across CPUs. For example: Bank # | CPUx | CPUy 0 LS LS 1 RAZ UMC 2 CS NBIO 3 SMU RAZ Change the structures that cache MCA bank types to be per-CPU and update smca_get_bank_type() to handle this change. Move some SMCA-specific structures to amd.c from mce.h, since they no longer need to be global. Break out the "count" for bank types from struct smca_hwid, since this should provide a per-CPU count rather than a system-wide count. Apply the "const" qualifier to the struct smca_hwid_mcatypes array. The values in this array should not change at runtime. Signed-off-by: Yazen Ghannam Signed-off-by: Borislav Petkov Link: https://lore.kernel.org/r/20211216162905.4132657-3-yazen.ghannam@amd.com

x86/MCE/AMD, EDAC/mce_amd: Add new SMCA bank types

2021-12-22T16:19:18+00:00

Add HWID and McaType values for new SMCA bank types, and add their error descriptions to edac_mce_amd. The "PHY" bank types all have the same error descriptions, and the NBIF and SHUB bank types have the same error descriptions. So reuse the same arrays where appropriate. [ bp: Remove useless comments over hwid types. ] Signed-off-by: Yazen Ghannam Signed-off-by: Borislav Petkov Link: https://lore.kernel.org/r/20211216162905.4132657-2-yazen.ghannam@amd.com

EDAC/mce_amd: Do not load edac_mce_amd module on guests

2021-08-09T10:35:43+00:00

Hypervisors likely do not expose the SMCA feature to the guest and loading this module leads to false warnings. This module should not be loaded in guests to begin with, but people tend to do so, especially when testing kernels in VMs. And then they complain about those false warnings. Do the practical thing and do not load this module when running as a guest to avoid all that complaining. [ bp: Rewrite commit message. ] Suggested-by: Borislav Petkov Signed-off-by: Smita Koralahalli Signed-off-by: Borislav Petkov Reviewed-by: Yazen Ghannam Tested-by: Kim Phillips Link: https://lkml.kernel.org/r/20210628172740.245689-1-Smita.KoralahalliChannabasappa@amd.com

EDAC/mce_amd: Fix typo "FIfo" -> "Fifo"

2021-06-04T13:44:25+00:00

There is an uppercase letter I in one of the MCE error descriptions instead of a lowercase one. Fix it. Signed-off-by: Colin Ian King Signed-off-by: Borislav Petkov Reviewed-by: Yazen Ghannam Link: https://lkml.kernel.org/r/20210603103349.79117-1-colin.king@canonical.com

x86/MCE/AMD, EDAC/mce_amd: Add new SMCA bank types

2021-05-27T18:08:14+00:00

Add the (HWID, MCATYPE) tuples and names for new SMCA bank types. Also, add their respective error descriptions to the MCE decoding module edac_mce_amd. Also while at it, optimize the string names for some SMCA banks. [ bp: Drop repeated comments, explain why UMC_V2 is a separate entry. ] Signed-off-by: Muralidhara M K Signed-off-by: Naveen Krishna Chatradhi Signed-off-by: Borislav Petkov Reviewed-by: Yazen Ghannam Link: https://lkml.kernel.org/r/20210526164601.66228-1-nchatrad@amd.com

EDAC/mce_amd: Use struct cpuinfo_x86.cpu_die_id for AMD NodeId

2020-11-19T10:43:21+00:00

The edac_mce_amd module calls decode_dram_ecc() on AMD Family17h and later systems. This function is used in amd64_edac_mod to do system-specific decoding for DRAM ECC errors. The function takes a "NodeId" as a parameter. In AMD documentation, NodeId is used to identify a physical die in a system. This can be used to identify a node in the AMD_NB code and also it is used with umc_normaddr_to_sysaddr(). However, the input used for decode_dram_ecc() is currently the NUMA node of a logical CPU. In the default configuration, the NUMA node and physical die will be equivalent, so this doesn't have an impact. But the NUMA node configuration can be adjusted with optional memory interleaving modes. This will cause the NUMA node enumeration to not match the physical die enumeration. The mismatch will cause the address translation function to fail or report incorrect results. Use struct cpuinfo_x86.cpu_die_id for the node_id parameter to ensure the physical ID is used. Fixes: fbe63acf62f5 ("EDAC, mce_amd: Use cpu_to_node() to find the node ID") Signed-off-by: Yazen Ghannam Signed-off-by: Borislav Petkov Link: https://lkml.kernel.org/r/20201109210659.754018-4-Yazen.Ghannam@amd.com