kernel/linux.git/drivers/dma/xilinx, branch master

Merge tag 'dmaengine-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

2026-04-17T17:29:01+00:00

Pull dmaengine updates from Vinod Koul: "Core: - New devm_of_dma_controller_register() API New Support: - Support for RZ/G3L SoC - Loongson Multi-Channel DMA controller support - Conversion of Xilinx AXI DMA binding - DW AXI CV1800B DMA support - Switchtec DMA engine driver Updates: - AMD MDB Endpoint and non-LL mode support - DW edma virtual IRQ for interrupt-emulation, cyclic transfers support" * tag 'dmaengine-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (65 commits) dmaengine: dw-edma: Add non-LL mode dmaengine: dw-edma: Add AMD MDB Endpoint Support dt-bindings: dmaengine: Fix spelling mistake "Looongson" -> "Looogson" dmaengine: loongson: Fix spelling mistake "Looongson" -> "Looogson" dmaengine: loongson: New driver for the Loongson Multi-Channel DMA controller dt-bindings: dmaengine: Add Loongson Multi-Channel DMA controller dmaengine: loongson: loongson2-apb: Simplify locking with guard() and scoped_guard() dmaengine: loongson: loongson2-apb: Convert to devm_clk_get_enabled() dmaengine: loongson: loongson2-apb: Convert to dmaenginem_async_device_register() dmaengine: loongson: New directory for Loongson DMA controllers drivers dt-bindings: dma: xlnx,axi-dma: Convert to DT schema dt-bindings: dma: rz-dmac: Add conditional schema for RZ/G3L dmaengine: sh: rz-dmac: Add device_{pause,resume}() callbacks dmaengine: sh: rz-dmac: Add device_tx_status() callback dmaengine: sh: rz-dmac: Use rz_lmdesc_setup() to invalidate descriptors dmaengine: sh: rz-dmac: Drop unnecessary local_irq_save() call dmaengine: sh: rz-dmac: Drop goto instruction and label dmaengine: sh: rz-dmac: Drop read of CHCTRL register dmaengine: sh: rz_dmac: add RZ/{T2H,N2H} support dt-bindings: dma: renesas,rz-dmac: document RZ/{T2H,N2H} ...

dmaengine: xilinx_dma: Fix reset related timeout with two-channel AXIDMA

2026-03-17T11:03:32+00:00

A single AXIDMA controller can have one or two channels. When it has two channels, the reset for both are tied together: resetting one channel resets the other as well. This creates a problem where resetting one channel will reset the registers for both channels, including clearing interrupt enable bits for the other channel, which can then lead to timeouts as the driver is waiting for an interrupt which never comes. The driver currently has a probe-time work around for this: when a channel is created, the driver also resets and enables the interrupts. With two channels the reset for the second channel will clear the interrupt enables for the first one. The work around in the driver is just to manually enable the interrupts again in xilinx_dma_alloc_chan_resources(). This workaround only addresses the probe-time issue. When channels are reset at runtime (e.g., in xilinx_dma_terminate_all() or during error recovery), there's no corresponding mechanism to restore the other channel's interrupt enables. This leads to one channel having its interrupts disabled while the driver expects them to work, causing timeouts and DMA failures. A proper fix is a complicated matter, as we should not reset the other channel when it's operating normally. So, perhaps, there should be some kind of synchronization for a common reset, which is not trivial to implement. To add to the complexity, the driver also supports other DMA types, like VDMA, CDMA and MCDMA, which don't have a shared reset. However, when the two-channel AXIDMA is used in the (assumably) normal use case, providing DMA for a single memory-to-memory device, the common reset is a bit smaller issue: when something bad happens on one channel, or when one channel is terminated, the assumption is that we also want to terminate the other channel. And thus resetting both at the same time is "ok". With that line of thinking we can implement a bit better work around than just the current probe time work around: let's enable the AXIDMA interrupts at xilinx_dma_start_transfer() instead. This ensures interrupts are enabled whenever a transfer starts, regardless of any prior resets that may have cleared them. This approach is also more logical: enable interrupts only when needed for a transfer, rather than at resource allocation time, and, I think, all the other DMA types should also use this model, but I'm reluctant to do such changes as I cannot test them. The reset function still enables interrupts even though it's not needed for AXIDMA anymore, but it's common code for all DMA types (VDMA, CDMA, MCDMA), so leave it unchanged to avoid affecting other variants. Signed-off-by: Tomi Valkeinen Fixes: c0bba3a99f07 ("dmaengine: vdma: Add Support for Xilinx AXI Direct Memory Access Engine") Link: https://patch.msgid.link/20260311-xilinx-dma-fix-v2-1-a725abb66e3c@ideasonboard.com Signed-off-by: Vinod Koul

dmaengine: xilinx: xilinx_dma: Fix unmasked residue subtraction

2026-03-17T10:44:34+00:00

The segment .control and .status fields both contain top bits which are not part of the buffer size, the buffer size is located only in the bottom max_buffer_len bits. To avoid interference from those top bits, mask out the size using max_buffer_len first, and only then subtract the values. Fixes: a575d0b4e663 ("dmaengine: xilinx_dma: Introduce xilinx_dma_get_residue") Signed-off-by: Marek Vasut Link: https://patch.msgid.link/20260316222530.163815-1-marex@nabladev.com Signed-off-by: Vinod Koul

dmaengine: xilinx: xilinx_dma: Fix residue calculation for cyclic DMA

2026-03-17T10:44:20+00:00

The cyclic DMA calculation is currently entirely broken and reports residue only for the first segment. The problem is twofold. First, when the first descriptor finishes, it is moved from active_list to done_list, but it is never returned back into the active_list. The xilinx_dma_tx_status() expects the descriptor to be in the active_list to report any meaningful residue information, which never happens after the first descriptor finishes. Fix this up in xilinx_dma_start_transfer() and if the descriptor is cyclic, lift it from done_list and place it back into active_list list. Second, the segment .status fields of the descriptor remain dirty. Once the DMA did one pass on the descriptor, the .status fields are populated with data by the DMA, but the .status fields are not cleared before reuse during the next cyclic DMA round. The xilinx_dma_get_residue() recognizes that as if the descriptor was complete and had 0 residue, which is bogus. Reinitialize the status field before placing the descriptor back into the active_list. Fixes: c0bba3a99f07 ("dmaengine: vdma: Add Support for Xilinx AXI Direct Memory Access Engine") Signed-off-by: Marek Vasut Link: https://patch.msgid.link/20260316221943.160375-1-marex@nabladev.com Signed-off-by: Vinod Koul

dmaengine: xilinx: xilinx_dma: Fix dma_device directions

2026-03-17T10:44:06+00:00

Unlike chan->direction , struct dma_device .directions field is a bitfield. Turn chan->direction into a bitfield to make it compatible with struct dma_device .directions . Fixes: 7e01511443c3 ("dmaengine: xilinx_dma: Set dma_device directions") Signed-off-by: Marek Vasut Link: https://patch.msgid.link/20260316221728.160139-1-marex@nabladev.com Signed-off-by: Vinod Koul

Merge branch 'fixes' into next

2026-03-17T10:41:43+00:00

This brings in the rz-dmac fixes which are in fixes

dmaengine: xilinx: Update kernel-doc comments

2026-03-09T07:28:25+00:00

Two members of struct xdma_desc_block are not descibed leading to warnings, document them. Warning: drivers/dma/xilinx/xdma.c:75 struct member 'last_interrupt' not described in 'xdma_chan' Warning: drivers/dma/xilinx/xdma.c:75 struct member 'stop_requested' not described in 'xdma_chan' Link: https://patch.msgid.link/20260227022905.233721-1-vkoul@kernel.org Signed-off-by: Vinod Koul

dmaengine: xilinx: Simplify with scoped for each OF child loop

2026-03-09T07:28:22+00:00

Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260301142158.90319-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Vinod Koul

dmaengine: xilinx: xdma: Fix regmap init error handling

2026-03-09T07:21:22+00:00

devm_regmap_init_mmio returns an ERR_PTR() upon error, not NULL. Fix the error check and also fix the error message. Use the error code from ERR_PTR() instead of the wrong value in ret. Fixes: 17ce252266c7 ("dmaengine: xilinx: xdma: Add xilinx xdma driver") Signed-off-by: Alexander Stein Reviewed-by: Frank Li Link: https://patch.msgid.link/20251014061309.283468-1-alexander.stein@ew.tq-group.com Signed-off-by: Vinod Koul

Convert more 'alloc_obj' cases to default GFP_KERNEL arguments

2026-02-22T04:03:00+00:00

This converts some of the visually simpler cases that have been split over multiple lines. I only did the ones that are easy to verify the resulting diff by having just that final GFP_KERNEL argument on the next line. Somebody should probably do a proper coccinelle script for this, but for me the trivial script actually resulted in an assertion failure in the middle of the script. I probably had made it a bit _too_ trivial. So after fighting that far a while I decided to just do some of the syntactically simpler cases with variations of the previous 'sed' scripts. The more syntactically complex multi-line cases would mostly really want whitespace cleanup anyway. Signed-off-by: Linus Torvalds