<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/dma/Makefile, branch v6.19.11</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.11</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.11'/>
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<updated>2025-06-17T05:56:13+00:00</updated>
<entry>
<title>dmaengine: add driver for Sophgo CV18XX/SG200X dmamux</title>
<updated>2025-06-17T05:56:13+00:00</updated>
<author>
<name>Inochi Amaoto</name>
<email>inochiama@gmail.com</email>
</author>
<published>2025-06-11T08:09:59+00:00</published>
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<id>urn:sha1:db7d07b5add4d839df74adab9940cf9da488313f</id>
<content type='text'>
Sophgo CV18XX/SG200X use DW AXI CORE with a multiplexer for remapping
its request lines. The multiplexer supports at most 8 request lines.

Add driver for Sophgo CV18XX/SG200X DMA multiplexer.

Signed-off-by: Inochi Amaoto &lt;inochiama@gmail.com&gt;
Tested-by: Alexander Sverdlin &lt;alexander.sverdlin@gmail.com&gt;
Link: https://lore.kernel.org/r/20250611081000.1187374-3-inochiama@gmail.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: Add Arm DMA-350 driver</title>
<updated>2025-04-17T15:17:39+00:00</updated>
<author>
<name>Robin Murphy</name>
<email>robin.murphy@arm.com</email>
</author>
<published>2025-03-12T12:05:10+00:00</published>
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<id>urn:sha1:5d099706449d54b4693a1c6bb7c2251072234508</id>
<content type='text'>
Add an initial driver for the Arm Corelink DMA-350 controller, to
support basic mem-to-mem async_tx. The design here leaves room for more
fun things like peripheral support and scatter-gather chaining to come
in future.

Signed-off-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
Link: https://lore.kernel.org/r/6d7d8efefa935d34977b59a74797ab377528db94.1741780808.git.robin.murphy@arm.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: Move AMD PTDMA driver to amd directory</title>
<updated>2024-12-02T17:25:27+00:00</updated>
<author>
<name>Basavaraj Natikar</name>
<email>Basavaraj.Natikar@amd.com</email>
</author>
<published>2024-10-25T09:59:26+00:00</published>
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<id>urn:sha1:e01ee7c660752923b2d0881fb20045ce79677258</id>
<content type='text'>
PTDMA driver is the AMD DMA driver, and newer AMD platforms support newer
DMA engines. Hence, move the current drivers to the AMD directory. This
would also mean that future driver submissions to the AMD DMA driver will
also land in the AMD-specific directory.

Reviewed-by: Raju Rangoju &lt;Raju.Rangoju@amd.com&gt;
Signed-off-by: Basavaraj Natikar &lt;Basavaraj.Natikar@amd.com&gt;
Link: https://lore.kernel.org/r/20241025095931.726018-2-Basavaraj.Natikar@amd.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: loongson2-apb: Rename the prefix ls2x to loongson2</title>
<updated>2024-10-23T05:35:45+00:00</updated>
<author>
<name>Binbin Zhou</name>
<email>zhoubinbin@loongson.cn</email>
</author>
<published>2024-09-24T06:42:41+00:00</published>
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<id>urn:sha1:8974f34de2ef173470a596a4dee22f4922583d1b</id>
<content type='text'>
Since commit e06c43231214 ("dmaengine: Loongson1: Add Loongson-1 APB DMA
driver"), the Loongson-1 dma controller was added.

Unfortunately their naming has not been standardized, as CPUs belonging
to the same Loongson family, we expect to standardize the naming for
ease of understanding.

Signed-off-by: Binbin Zhou &lt;zhoubinbin@loongson.cn&gt;
Link: https://lore.kernel.org/r/20240924064241.2414629-1-zhoubinbin@loongson.cn
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: Add dma router for pl08x in LPC32XX SoC</title>
<updated>2024-08-29T17:24:11+00:00</updated>
<author>
<name>Piotr Wojtaszczyk</name>
<email>piotr.wojtaszczyk@timesys.com</email>
</author>
<published>2024-06-28T15:20:19+00:00</published>
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<id>urn:sha1:5d318b5959824e15d32f19b2224c69da89e98178</id>
<content type='text'>
LPC32XX connects few of its peripherals to pl08x DMA thru a multiplexer,
this driver allows to route a signal request line thru the multiplexer for
given peripheral.

Signed-off-by: Piotr Wojtaszczyk &lt;piotr.wojtaszczyk@timesys.com&gt;
Link: https://lore.kernel.org/r/20240628152022.274405-1-piotr.wojtaszczyk@timesys.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: Loongson1: Add Loongson-1 APB DMA driver</title>
<updated>2024-08-29T17:17:24+00:00</updated>
<author>
<name>Keguang Zhang</name>
<email>keguang.zhang@gmail.com</email>
</author>
<published>2024-08-09T10:30:59+00:00</published>
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<id>urn:sha1:e06c432312148ddb550ec55b004e32671657ea23</id>
<content type='text'>
Add APB DMA driver for Loongson-1 SoCs.

Reviewed-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Keguang Zhang &lt;keguang.zhang@gmail.com&gt;
Link: https://lore.kernel.org/r/20240809-loongson1-dma-v12-2-d9469a4a6b85@gmail.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: amd: qdma: Add AMD QDMA driver</title>
<updated>2024-08-28T18:04:13+00:00</updated>
<author>
<name>Nishad Saraf</name>
<email>nishads@amd.com</email>
</author>
<published>2024-08-19T21:19:48+00:00</published>
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<id>urn:sha1:73d5fc92a11cacb73a1aac0b5793c47e48c5b537</id>
<content type='text'>
Adds driver to enable PCIe board which uses AMD QDMA (the Queue-based
Direct Memory Access) subsystem. For example, Xilinx Alveo V70 AI
Accelerator devices.
    https://www.xilinx.com/applications/data-center/v70.html

The QDMA subsystem is used in conjunction with the PCI Express IP block
to provide high performance data transfer between host memory and the
card's DMA subsystem.

            +-------+       +-------+       +-----------+
   PCIe     |       |       |       |       |           |
   Tx/Rx    |       |       |       |  AXI  |           |
 &lt;=======&gt;  | PCIE  | &lt;===&gt; | QDMA  | &lt;====&gt;| User Logic|
            |       |       |       |       |           |
            +-------+       +-------+       +-----------+

The primary mechanism to transfer data using the QDMA is for the QDMA
engine to operate on instructions (descriptors) provided by the host
operating system. Using the descriptors, the QDMA can move data in both
the Host to Card (H2C) direction, or the Card to Host (C2H) direction.
The QDMA provides a per-queue basis option whether DMA traffic goes
to an AXI4 memory map (MM) interface or to an AXI4-Stream interface.

The hardware detail is provided by
    https://docs.xilinx.com/r/en-US/pg302-qdma

Implements dmaengine APIs to support MM DMA transfers.
- probe the available DMA channels
- use dma_slave_map for channel lookup
- use virtual channel to manage dmaengine tx descriptors
- implement device_prep_slave_sg callback to handle host scatter gather
  list

Signed-off-by: Nishad Saraf &lt;nishads@amd.com&gt;
Signed-off-by: Lizhi Hou &lt;lizhi.hou@amd.com&gt;
Link: https://lore.kernel.org/r/20240819211948.688786-2-lizhi.hou@amd.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: stm32: New directory for STM32 DMA controllers drivers</title>
<updated>2024-06-11T18:25:33+00:00</updated>
<author>
<name>Amelie Delaunay</name>
<email>amelie.delaunay@foss.st.com</email>
</author>
<published>2024-05-31T15:07:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=76178a2c49a7c01ef684b0d689f3da4fd12e0154'/>
<id>urn:sha1:76178a2c49a7c01ef684b0d689f3da4fd12e0154</id>
<content type='text'>
Gather the STM32 DMA controllers under drivers/dma/stm32/

Signed-off-by: Amelie Delaunay &lt;amelie.delaunay@foss.st.com&gt;
Link: https://lore.kernel.org/r/20240531150712.2503554-3-amelie.delaunay@foss.st.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: fsl-edma: add trace event support</title>
<updated>2024-05-04T12:30:16+00:00</updated>
<author>
<name>Frank Li</name>
<email>Frank.Li@nxp.com</email>
</author>
<published>2024-04-25T20:59:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=11102d0c343ba06ddd303f2503c0ce46d70052f2'/>
<id>urn:sha1:11102d0c343ba06ddd303f2503c0ce46d70052f2</id>
<content type='text'>
Implement trace event support to enhance logging functionality for
register access and the transfer control descriptor (TCD) context.
This will enable more comprehensive monitoring and analysis of system
activities

Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Link: https://lore.kernel.org/r/20240425205947.3436501-1-Frank.Li@nxp.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: ls2x-apb: New driver for the Loongson LS2X APB DMA controller</title>
<updated>2023-12-21T16:05:13+00:00</updated>
<author>
<name>Binbin Zhou</name>
<email>zhoubinbin@loongson.cn</email>
</author>
<published>2023-12-18T01:56:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=71e7d3cb6e55ae2eadcdb178f9243dc18499d369'/>
<id>urn:sha1:71e7d3cb6e55ae2eadcdb178f9243dc18499d369</id>
<content type='text'>
The Loongson LS2X APB DMA controller is available on Loongson-2K chips.

It is a single-channel, configurable DMA controller IP core based on the
AXI bus, whose main function is to integrate DMA functionality on a chip
dedicated to carrying data between memory and peripherals in APB bus
(e.g. nand).

Signed-off-by: Binbin Zhou &lt;zhoubinbin@loongson.cn&gt;
Signed-off-by: Yingkun Meng &lt;mengyingkun@loongson.cn&gt;
Link: https://lore.kernel.org/r/8df2a0199434fba3535831082966c2442ecf1cae.1702365725.git.zhoubinbin@loongson.cn
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
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