<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/crypto/xilinx, branch v6.19.11</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.11</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.11'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2025-11-06T06:31:08+00:00</updated>
<entry>
<title>crypto: xilinx - Use %pe to print PTR_ERR</title>
<updated>2025-11-06T06:31:08+00:00</updated>
<author>
<name>Harsh Jain</name>
<email>h.jain@amd.com</email>
</author>
<published>2025-10-29T07:08:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=426b1a1bdfcec75457104f50443e7d7dc024e5e8'/>
<id>urn:sha1:426b1a1bdfcec75457104f50443e7d7dc024e5e8</id>
<content type='text'>
Fix cocci warnings to use %pe to print PTR_ERR().

Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Reported-by: Julia Lawall &lt;julia.lawall@inria.fr&gt;
Closes: https://lore.kernel.org/r/202510231229.Z6TduqZy-lkp@intel.com/
Signed-off-by: Harsh Jain &lt;h.jain@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: xilinx-trng - Add CTR_DRBG DF processing of seed</title>
<updated>2025-10-17T08:03:57+00:00</updated>
<author>
<name>Harsh Jain</name>
<email>h.jain@amd.com</email>
</author>
<published>2025-09-15T13:30:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1a098379f28b05996603888ff7dd508e5773d5d9'/>
<id>urn:sha1:1a098379f28b05996603888ff7dd508e5773d5d9</id>
<content type='text'>
Versal TRNG IP does not support Derivation Function (DF) of seed.
Add DF processing for CTR_DRBG mode.

Signed-off-by: Harsh Jain &lt;h.jain@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: xilinx - Add TRNG driver for Versal</title>
<updated>2025-09-06T07:57:23+00:00</updated>
<author>
<name>Harsh Jain</name>
<email>h.jain@amd.com</email>
</author>
<published>2025-08-25T07:16:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8979744aca8096ee5072798dfc1181606919b35d'/>
<id>urn:sha1:8979744aca8096ee5072798dfc1181606919b35d</id>
<content type='text'>
Add True Random Number Generator(TRNG) driver for Versal
platform.

Co-developed-by: Mounika Botcha &lt;mounika.botcha@amd.com&gt;
Signed-off-by: Mounika Botcha &lt;mounika.botcha@amd.com&gt;
Signed-off-by: Harsh Jain &lt;h.jain@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: zynqmp-sha - Fix partial block implementation</title>
<updated>2025-05-05T10:20:46+00:00</updated>
<author>
<name>Herbert Xu</name>
<email>herbert@gondor.apana.org.au</email>
</author>
<published>2025-05-04T06:13:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ecd71c95a60e7298acfabe81189439f350bd0e18'/>
<id>urn:sha1:ecd71c95a60e7298acfabe81189439f350bd0e18</id>
<content type='text'>
The zynqmp-sha partial block was based on an old design of the
partial block API where the leftover calculation was done in the
Crypto API.  As the leftover calculation is now done by the
algorithm, fix this by passing the partial blocks to the fallback.

Also zero the stack descriptors.

Fixes: 201e9ec3b621 ("crypto: zynqmp-sha - Use API partial block handling")
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: zynqmp-sha - Use API partial block handling</title>
<updated>2025-04-23T07:52:46+00:00</updated>
<author>
<name>Herbert Xu</name>
<email>herbert@gondor.apana.org.au</email>
</author>
<published>2025-04-18T03:00:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=201e9ec3b621c9542441eb7bd34facbc1749b975'/>
<id>urn:sha1:201e9ec3b621c9542441eb7bd34facbc1749b975</id>
<content type='text'>
Use the Crypto API partial block handling.

As this was the last user of the extra fields in struct sha3_state,
remove them.

Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: zynqmp-sha - Add locking</title>
<updated>2025-04-16T07:36:24+00:00</updated>
<author>
<name>Herbert Xu</name>
<email>herbert@gondor.apana.org.au</email>
</author>
<published>2025-04-12T10:57:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c7e68043620e0d5f89a37e573c667beab72d2937'/>
<id>urn:sha1:c7e68043620e0d5f89a37e573c667beab72d2937</id>
<content type='text'>
The hardwrae is only capable of one hash at a time, so add a lock
to make sure that it isn't used concurrently.

Fixes: 7ecc3e34474b ("crypto: xilinx - Add Xilinx SHA3 driver")
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: zynqmp-sha - Make descsize an algorithm attribute</title>
<updated>2025-04-16T07:36:24+00:00</updated>
<author>
<name>Herbert Xu</name>
<email>herbert@gondor.apana.org.au</email>
</author>
<published>2025-04-12T10:47:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c1dd353d18e53b39dffe5d8fce948f959ac73bbc'/>
<id>urn:sha1:c1dd353d18e53b39dffe5d8fce948f959ac73bbc</id>
<content type='text'>
Rather than setting descsize in init_tfm, set it statically and
double-check it in init_tfm.

Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: drivers - Switch back to struct platform_driver::remove()</title>
<updated>2024-10-19T00:44:30+00:00</updated>
<author>
<name>Uwe Kleine-König</name>
<email>u.kleine-koenig@baylibre.com</email>
</author>
<published>2024-10-07T20:58:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f51c527f17c534143f6f6b769be8e078b411b20c'/>
<id>urn:sha1:f51c527f17c534143f6f6b769be8e078b411b20c</id>
<content type='text'>
After commit 0edb555a65d1 ("platform: Make platform_driver::remove()
return void") .remove() is (again) the right callback to implement for
platform drivers.

Convert all platform drivers below drivers/crypto to use .remove(), with
the eventual goal to drop struct platform_driver::remove_new(). As
.remove() and .remove_new() have the same prototypes, conversion is done
by just changing the structure member name in the driver initializer.

Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@baylibre.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: xilinx - add missing MODULE_DESCRIPTION() macro</title>
<updated>2024-06-07T11:47:59+00:00</updated>
<author>
<name>Jeff Johnson</name>
<email>quic_jjohnson@quicinc.com</email>
</author>
<published>2024-06-02T23:17:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ed6261d553f505e6b0ce8593bf3f3792928b0ab8'/>
<id>urn:sha1:ed6261d553f505e6b0ce8593bf3f3792928b0ab8</id>
<content type='text'>
make allmodconfig &amp;&amp; make W=1 C=1 reports:
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/crypto/xilinx/zynqmp-aes-gcm.o

Add the missing invocation of the MODULE_DESCRIPTION() macro.

Signed-off-by: Jeff Johnson &lt;quic_jjohnson@quicinc.com&gt;
Reviewed-by: Michal Simek &lt;michal.simek@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: xilinx - call finalize with bh disabled</title>
<updated>2024-02-09T04:57:18+00:00</updated>
<author>
<name>Quanyang Wang</name>
<email>quanyang.wang@windriver.com</email>
</author>
<published>2024-01-28T04:29:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a853450bf4c752e664abab0b2fad395b7ad7701c'/>
<id>urn:sha1:a853450bf4c752e664abab0b2fad395b7ad7701c</id>
<content type='text'>
When calling crypto_finalize_request, BH should be disabled to avoid
triggering the following calltrace:

    ------------[ cut here ]------------
    WARNING: CPU: 2 PID: 74 at crypto/crypto_engine.c:58 crypto_finalize_request+0xa0/0x118
    Modules linked in: cryptodev(O)
    CPU: 2 PID: 74 Comm: firmware:zynqmp Tainted: G           O       6.8.0-rc1-yocto-standard #323
    Hardware name: ZynqMP ZCU102 Rev1.0 (DT)
    pstate: 40000005 (nZcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
    pc : crypto_finalize_request+0xa0/0x118
    lr : crypto_finalize_request+0x104/0x118
    sp : ffffffc085353ce0
    x29: ffffffc085353ce0 x28: 0000000000000000 x27: ffffff8808ea8688
    x26: ffffffc081715038 x25: 0000000000000000 x24: ffffff880100db00
    x23: ffffff880100da80 x22: 0000000000000000 x21: 0000000000000000
    x20: ffffff8805b14000 x19: ffffff880100da80 x18: 0000000000010450
    x17: 0000000000000000 x16: 0000000000000000 x15: 0000000000000000
    x14: 0000000000000003 x13: 0000000000000000 x12: ffffff880100dad0
    x11: 0000000000000000 x10: ffffffc0832dcd08 x9 : ffffffc0812416d8
    x8 : 00000000000001f4 x7 : ffffffc0830d2830 x6 : 0000000000000001
    x5 : ffffffc082091000 x4 : ffffffc082091658 x3 : 0000000000000000
    x2 : ffffffc7f9653000 x1 : 0000000000000000 x0 : ffffff8802d20000
    Call trace:
     crypto_finalize_request+0xa0/0x118
     crypto_finalize_aead_request+0x18/0x30
     zynqmp_handle_aes_req+0xcc/0x388
     crypto_pump_work+0x168/0x2d8
     kthread_worker_fn+0xfc/0x3a0
     kthread+0x118/0x138
     ret_from_fork+0x10/0x20
    irq event stamp: 40
    hardirqs last  enabled at (39): [&lt;ffffffc0812416f8&gt;] _raw_spin_unlock_irqrestore+0x70/0xb0
    hardirqs last disabled at (40): [&lt;ffffffc08122d208&gt;] el1_dbg+0x28/0x90
    softirqs last  enabled at (36): [&lt;ffffffc080017dec&gt;] kernel_neon_begin+0x8c/0xf0
    softirqs last disabled at (34): [&lt;ffffffc080017dc0&gt;] kernel_neon_begin+0x60/0xf0
    ---[ end trace 0000000000000000 ]---

Fixes: 4d96f7d48131 ("crypto: xilinx - Add Xilinx AES driver")
Signed-off-by: Quanyang Wang &lt;quanyang.wang@windriver.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
</feed>
