Linux kernel stable tree (mirror) https://git.radix-linux.su/kernel/linux.git/atom?h=v5.15.7 2021-04-16T11:16:33+00:00 2021-04-16T11:16:33+00:00 Shixin Liu liushixin2@huawei.com 2021-04-08T07:18:36+00:00 urn:sha1:747bf30fd944f02f341b5f3bc7d97a13f2ae2fbe pm_runtime_get_sync will increment pm usage counter even it failed. Forgetting to putting operation will result in reference leak here. Fix it by replacing it with pm_runtime_resume_and_get to keep usage counter balanced. Signed-off-by: Shixin Liu <liushixin2@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2021-04-16T11:16:33+00:00 Shixin Liu liushixin2@huawei.com 2021-04-08T07:18:35+00:00 urn:sha1:1cb3ad701970e68f18a9e5d090baf2b1b703d729 pm_runtime_get_sync will increment pm usage counter even it failed. Forgetting to putting operation will result in reference leak here. Fix it by replacing it with pm_runtime_resume_and_get to keep usage counter balanced. Signed-off-by: Shixin Liu <liushixin2@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2021-01-14T06:10:25+00:00 Herbert Xu herbert@gondor.apana.org.au 2021-01-04T06:15:45+00:00 urn:sha1:81064c96d88180ad6995d52419e94a78968308a2 This patch changes the cast in stm32_cryp_check_ctr_counter from u32 to __be32 to match the prototype of stm32_cryp_hw_write_iv correctly. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2020-11-20T03:45:33+00:00 Eric Biggers ebiggers@google.com 2020-11-13T05:20:21+00:00 urn:sha1:a24d22b225ce158651378869a6b88105c4bdb887 Currently <crypto/sha.h> contains declarations for both SHA-1 and SHA-2, and <crypto/sha3.h> contains declarations for SHA-3. This organization is inconsistent, but more importantly SHA-1 is no longer considered to be cryptographically secure. So to the extent possible, SHA-1 shouldn't be grouped together with any of the other SHA versions, and usage of it should be phased out. Therefore, split <crypto/sha.h> into two headers <crypto/sha1.h> and <crypto/sha2.h>, and make everyone explicitly specify whether they want the declarations for SHA-1, SHA-2, or both. This avoids making the SHA-1 declarations visible to files that don't want anything to do with SHA-1. It also prepares for potentially moving sha1.h into a new insecure/ or dangerous/ directory. Signed-off-by: Eric Biggers <ebiggers@google.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Jason A. Donenfeld <Jason@zx2c4.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2020-09-25T07:48:14+00:00 Nicolas Toromanoff nicolas.toromanoff@st.com 2020-09-16T06:33:44+00:00 urn:sha1:bbf2cb1ea1e1428589d7f4d652bed15b265ce92d If STM32 CRC device is already in use, calculate CRC by software. This will release CPU constraint for a concurrent access to the hardware, and avoid masking irqs during the whole block processing. Fixes: 7795c0baf5ac ("crypto: stm32/crc32 - protect from concurrent accesses") Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2020-09-18T07:20:12+00:00 Krzysztof Kozlowski krzk@kernel.org 2020-09-10T19:29:18+00:00 urn:sha1:5a062f09168f4291a89c0ff3ed556e1403819910 Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2020-08-28T06:58:30+00:00 Herbert Xu herbert@gondor.apana.org.au 2020-08-21T13:59:12+00:00 urn:sha1:bbb2832620ac4e136416aa97af7310636422dea9 This patch fixes most of the sparse endianness warnings in stm32. The patch itself doesn't change anything apart from markings, but there is some questionable code in stm32_cryp_check_ctr_counter. That function operates on the counters as if they're in CPU order, however, they're then written out as big-endian. This looks like a genuine bug. Therefore I've left that warning alone until someone can confirm that this really does work as intended on little-endian. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2020-08-25T01:24:07+00:00 Herbert Xu herbert@gondor.apana.org.au 2020-08-21T12:42:10+00:00 urn:sha1:3033fd177bcc3e0762b43cb82cf584dbb07064f1 The stm32 driver was missing a number of includes that we being pulled in by unrelated header files. As the indirect inclusion went away, it now fails to build. This patch adds the missing inclusions. Reported-by: kernel test robot <lkp@intel.com> Fixes: 0c3dc787a62a ("crypto: algapi - Remove skbuff.h inclusion") Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2020-05-22T14:08:21+00:00 Nicolas Toromanoff nicolas.toromanoff@st.com 2020-05-12T14:11:13+00:00 urn:sha1:7795c0baf5ac25e104fec8677ad134066a8fb8d3 Protect STM32 CRC device from concurrent accesses. As we create a spinlocked section that increase with buffer size, we provide a module parameter to release the pressure by splitting critical section in chunks. Size of each chunk is defined in burst_size module parameter. By default burst_size=0, i.e. don't split incoming buffer. Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2020-05-22T14:08:21+00:00 Nicolas Toromanoff nicolas.toromanoff@st.com 2020-05-12T14:11:12+00:00 urn:sha1:100f84beee4874234d04a1ea642b8c9738d7020d Ensure stm32_crc_update() and stm32_crc_init() can be called in atomic context and can't sleep. Add pm_runtime_irq_safe() to make pm_runtime_get_sync() atomic. Change runtime pm to call clk_enable()/clk_disable() and change system pm to unprepare/prepare the clock and force runtime pm suspend/resume. Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>