<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/crypto/Kconfig, branch v6.18.21</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.18.21</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.18.21'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2025-10-04T21:59:29+00:00</updated>
<entry>
<title>Merge tag 'v6.18-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6</title>
<updated>2025-10-04T21:59:29+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-10-04T21:59:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=908057d185a41560a55890afa69c9676fc63e55c'/>
<id>urn:sha1:908057d185a41560a55890afa69c9676fc63e55c</id>
<content type='text'>
Pull crypto updates from Herbert Xu:
 "Drivers:
   - Add ciphertext hiding support to ccp
   - Add hashjoin, gather and UDMA data move features to hisilicon
   - Add lz4 and lz77_only to hisilicon
   - Add xilinx hwrng driver
   - Add ti driver with ecb/cbc aes support
   - Add ring buffer idle and command queue telemetry for GEN6 in qat

  Others:
   - Use rcu_dereference_all to stop false alarms in rhashtable
   - Fix CPU number wraparound in padata"

* tag 'v6.18-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (78 commits)
  dt-bindings: rng: hisi-rng: convert to DT schema
  crypto: doc - Add explicit title heading to API docs
  hwrng: ks-sa - fix division by zero in ks_sa_rng_init
  KEYS: X.509: Fix Basic Constraints CA flag parsing
  crypto: anubis - simplify return statement in anubis_mod_init
  crypto: hisilicon/qm - set NULL to qm-&gt;debug.qm_diff_regs
  crypto: hisilicon/qm - clear all VF configurations in the hardware
  crypto: hisilicon - enable error reporting again
  crypto: hisilicon/qm - mask axi error before memory init
  crypto: hisilicon/qm - invalidate queues in use
  crypto: qat - Return pointer directly in adf_ctl_alloc_resources
  crypto: aspeed - Fix dma_unmap_sg() direction
  rhashtable: Use rcu_dereference_all and rcu_dereference_all_check
  crypto: comp - Use same definition of context alloc and free ops
  crypto: omap - convert from tasklet to BH workqueue
  crypto: qat - Replace kzalloc() + copy_from_user() with memdup_user()
  crypto: caam - double the entropy delay interval for retry
  padata: WQ_PERCPU added to alloc_workqueue users
  padata: replace use of system_unbound_wq with system_dfl_wq
  crypto: cryptd - WQ_PERCPU added to alloc_workqueue users
  ...
</content>
</entry>
<entry>
<title>Merge tag 'soc-drivers-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2025-10-02T00:32:51+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-10-02T00:32:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=38057e323657695ec8f814aff0cdd1c7e00d3e9b'/>
<id>urn:sha1:38057e323657695ec8f814aff0cdd1c7e00d3e9b</id>
<content type='text'>
Pull SoC driver updates from Arnd Bergmann:
 "Lots of platform specific updates for Qualcomm SoCs, including a new
  TEE subsystem driver for the Qualcomm QTEE firmware interface.

  Added support for the Apple A11 SoC in drivers that are shared with
  the M1/M2 series, among more updates for those.

  Smaller platform specific driver updates for Renesas, ASpeed,
  Broadcom, Nvidia, Mediatek, Amlogic, TI, Allwinner, and Freescale
  SoCs.

  Driver updates in the cache controller, memory controller and reset
  controller subsystems.

  SCMI firmware updates to add more features and improve robustness.
  This includes support for having multiple SCMI providers in a single
  system.

  TEE subsystem support for protected DMA-bufs, allowing hardware to
  access memory areas that managed by the kernel but remain inaccessible
  from the CPU in EL1/EL0"

* tag 'soc-drivers-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (139 commits)
  soc/fsl/qbman: Use for_each_online_cpu() instead of for_each_cpu()
  soc: fsl: qe: Drop legacy-of-mm-gpiochip.h header from GPIO driver
  soc: fsl: qe: Change GPIO driver to a proper platform driver
  tee: fix register_shm_helper()
  pmdomain: apple: Add "apple,t8103-pmgr-pwrstate"
  dt-bindings: spmi: Add Apple A11 and T2 compatible
  serial: qcom-geni: Load UART qup Firmware from linux side
  spi: geni-qcom: Load spi qup Firmware from linux side
  i2c: qcom-geni: Load i2c qup Firmware from linux side
  soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem
  soc: qcom: geni-se: Cleanup register defines and update copyright
  dt-bindings: qcom: se-common: Add QUP Peripheral-specific properties for I2C, SPI, and SERIAL bus
  Documentation: tee: Add Qualcomm TEE driver
  tee: qcom: enable TEE_IOC_SHM_ALLOC ioctl
  tee: qcom: add primordial object
  tee: add Qualcomm TEE driver
  tee: increase TEE_MAX_ARG_SIZE to 4096
  tee: add TEE_IOCTL_PARAM_ATTR_TYPE_OBJREF
  tee: add TEE_IOCTL_PARAM_ATTR_TYPE_UBUF
  tee: add close_context to TEE driver operation
  ...
</content>
</entry>
<entry>
<title>crypto: atmel-aes: make it selectable for ARCH_MICROCHIP</title>
<updated>2025-09-09T08:34:22+00:00</updated>
<author>
<name>Robert Marko</name>
<email>robert.marko@sartura.hr</email>
</author>
<published>2025-08-13T17:44:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=38b22cde38aba61eafd752c8a2e43e631014e58a'/>
<id>urn:sha1:38b22cde38aba61eafd752c8a2e43e631014e58a</id>
<content type='text'>
LAN969x uses the Atmel crypto, so make it selectable for ARCH_MICROCHIP to
avoid needing to update depends in future if other Microchip SoC-s use it
as well.

Signed-off-by: Robert Marko &lt;robert.marko@sartura.hr&gt;
Acked-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Acked-by: Daniel Machon &lt;daniel.machon@microchip.com&gt;
Signed-off-by: Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;
</content>
</entry>
<entry>
<title>crypto: xilinx - Add TRNG driver for Versal</title>
<updated>2025-09-06T07:57:23+00:00</updated>
<author>
<name>Harsh Jain</name>
<email>h.jain@amd.com</email>
</author>
<published>2025-08-25T07:16:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8979744aca8096ee5072798dfc1181606919b35d'/>
<id>urn:sha1:8979744aca8096ee5072798dfc1181606919b35d</id>
<content type='text'>
Add True Random Number Generator(TRNG) driver for Versal
platform.

Co-developed-by: Mounika Botcha &lt;mounika.botcha@amd.com&gt;
Signed-off-by: Mounika Botcha &lt;mounika.botcha@amd.com&gt;
Signed-off-by: Harsh Jain &lt;h.jain@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: loongson - add Loongson RNG driver support</title>
<updated>2025-09-02T11:29:57+00:00</updated>
<author>
<name>Qunqin Zhao</name>
<email>zhaoqunqin@loongson.cn</email>
</author>
<published>2025-07-05T07:20:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=766b2d724c8df071031412eea902b566a0049c31'/>
<id>urn:sha1:766b2d724c8df071031412eea902b566a0049c31</id>
<content type='text'>
Loongson's Random Number Generator is found inside Loongson Security
Engine chip.

Co-developed-by: Yinggang Gu &lt;guyinggang@loongson.cn&gt;
Signed-off-by: Yinggang Gu &lt;guyinggang@loongson.cn&gt;
Signed-off-by: Qunqin Zhao &lt;zhaoqunqin@loongson.cn&gt;
Reviewed-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
Acked-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Link: https://lore.kernel.org/r/20250705072045.1067-3-zhaoqunqin@loongson.cn
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</content>
</entry>
<entry>
<title>crypto: ti - Add driver for DTHE V2 AES Engine (ECB, CBC)</title>
<updated>2025-08-30T07:43:26+00:00</updated>
<author>
<name>T Pratham</name>
<email>t-pratham@ti.com</email>
</author>
<published>2025-08-20T09:12:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=52f641bc63a46657b1d72d902fcee30ab1233c7b'/>
<id>urn:sha1:52f641bc63a46657b1d72d902fcee30ab1233c7b</id>
<content type='text'>
Add support for ECB and CBC modes in the AES Engine of the DTHE V2
hardware cryptography engine.

Signed-off-by: T Pratham &lt;t-pratham@ti.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: s390 - New s390 specific protected key hash phmac</title>
<updated>2025-06-26T10:52:33+00:00</updated>
<author>
<name>Harald Freudenberger</name>
<email>freude@linux.ibm.com</email>
</author>
<published>2025-06-17T13:44:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cbbc675506cc4cd93e6f895e7c1f693156f9a95c'/>
<id>urn:sha1:cbbc675506cc4cd93e6f895e7c1f693156f9a95c</id>
<content type='text'>
Add support for protected key hmac ("phmac") for s390 arch.

With the latest machine generation there is now support for
protected key (that is a key wrapped by a master key stored
in firmware) hmac for sha2 (sha224, sha256, sha384 and sha512)
for the s390 specific CPACF instruction kmac.

This patch adds support via 4 new ahashes registered as
phmac(sha224), phmac(sha256), phmac(sha384) and phmac(sha512).

Co-developed-by: Holger Dengler &lt;dengler@linux.ibm.com&gt;
Signed-off-by: Harald Freudenberger &lt;freude@linux.ibm.com&gt;
Reviewed-by: Holger Dengler &lt;dengler@linux.ibm.com&gt;
Signed-off-by: Holger Dengler &lt;dengler@linux.ibm.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>s390/crypto: Select crypto engine in Kconfig when PAES is chosen</title>
<updated>2025-06-02T08:49:52+00:00</updated>
<author>
<name>Harald Freudenberger</name>
<email>freude@linux.ibm.com</email>
</author>
<published>2025-05-28T08:30:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=34a149a02b5f1eb788d1f79252fccc7028e3856b'/>
<id>urn:sha1:34a149a02b5f1eb788d1f79252fccc7028e3856b</id>
<content type='text'>
The s390 PAES crypto algorithm has a dependency to the
crypto engine. So enable the crypto engine via
SELECT CRYPTO_ENGINE in drivers/crypto/Kconfig when
CRYPTO_PAES_S390 is chosen.

Fixes: 6cd87cb5ef6c ("s390/crypto: Rework protected key AES for true asynch support")
Reported-by: Thomas Huth &lt;thuth@redhat.com&gt;
Closes: https://lore.kernel.org/linux-s390/f958f869-8da3-48d9-a118-f3cf9a9ea75c@redhat.com/
Reviewed-by: Holger Dengler &lt;dengler@linux.ibm.com&gt;
Signed-off-by: Harald Freudenberger &lt;freude@linux.ibm.com&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Link: https://lore.kernel.org/r/20250528083032.224430-1-freude@linux.ibm.com
Signed-off-by: Heiko Carstens &lt;hca@linux.ibm.com&gt;
</content>
</entry>
<entry>
<title>crypto: cavium/zip - Remove driver</title>
<updated>2025-04-07T05:22:25+00:00</updated>
<author>
<name>Herbert Xu</name>
<email>herbert@gondor.apana.org.au</email>
</author>
<published>2025-03-19T12:31:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d462ae23bb3ca84eb82a53a671c915dc093eab43'/>
<id>urn:sha1:d462ae23bb3ca84eb82a53a671c915dc093eab43</id>
<content type='text'>
Remove cavium/zip as it is obsolete and stands in the way of
acomp API work.  If this is ever resurrected, please turn it
into an acomp driver.

Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: eip93 - Add Inside Secure SafeXcel EIP-93 crypto engine support</title>
<updated>2025-02-09T10:08:11+00:00</updated>
<author>
<name>Christian Marangi</name>
<email>ansuelsmth@gmail.com</email>
</author>
<published>2025-01-14T12:36:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9739f5f93b7806a684713ba42e6ed2d1df7c8100'/>
<id>urn:sha1:9739f5f93b7806a684713ba42e6ed2d1df7c8100</id>
<content type='text'>
Add support for the Inside Secure SafeXcel EIP-93 Crypto Engine used on
Mediatek MT7621 SoC and new Airoha SoC.

EIP-93 IP supports AES/DES/3DES ciphers in ECB/CBC and CTR modes as well as
authenc(HMAC(x), cipher(y)) using HMAC MD5, SHA1, SHA224 and SHA256.

EIP-93 provide regs to signal support for specific chipers and the
driver dynamically register only the supported one by the chip.

Signed-off-by: Richard van Schagen &lt;vschagen@icloud.com&gt;
Co-developed-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
</feed>
