<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/clocksource/timer-gx6605s.c, branch linux-7.1.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.1.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.1.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2020-08-24T11:01:39+00:00</updated>
<entry>
<title>clocksource/drivers/timer-gx6605s: Fixup counter reload</title>
<updated>2020-08-24T11:01:39+00:00</updated>
<author>
<name>Guo Ren</name>
<email>guoren@linux.alibaba.com</email>
</author>
<published>2020-08-18T07:31:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bc6717d55d07110d8f3c6d31ec2af50c11b07091'/>
<id>urn:sha1:bc6717d55d07110d8f3c6d31ec2af50c11b07091</id>
<content type='text'>
When the timer counts to the upper limit, an overflow interrupt is
generated, and the count is reset with the value in the TIME_INI
register. But the software expects to start counting from 0 when
the count overflows, so it forces TIME_INI to 0 to solve the
potential interrupt storm problem.

Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
Tested-by: Xu Kai &lt;xukai@nationalchip.com&gt;
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/1597735877-71115-1-git-send-email-guoren@kernel.org
</content>
</entry>
<entry>
<title>clocksource/drivers/c-sky: Add gx6605s SOC system timer</title>
<updated>2018-11-02T18:41:12+00:00</updated>
<author>
<name>Guo Ren</name>
<email>ren_guo@c-sky.com</email>
</author>
<published>2018-11-02T16:51:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=33745c3cc588d9d5e18d6fd88709002158dddd5e'/>
<id>urn:sha1:33745c3cc588d9d5e18d6fd88709002158dddd5e</id>
<content type='text'>
The driver is for gx6605s SOC system timer and there are two
same timers in gx6605s. We use one for clkevt and another one for
clksrc.

The timer is mmio map to access, so we need give mmio address in dts.

The counter at 0x0  offset is clock event.
The counter at 0x40 offset is clock source.

Signed-off-by: Guo Ren &lt;ren_guo@c-sky.com&gt;
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</content>
</entry>
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