kernel/linux.git/drivers/clk, branch v7.2-rc1

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

2026-06-25T19:48:57+00:00

Pull clk updates from Stephen Boyd: "This is all clk driver updates. Mostly new SoC support for various Qualcomm chips and Canaan K230. Otherwise there's non-critical fixes and updates to clk data such as adding missing clks to existing drivers or marking clks critical. Nothing looks especially exciting" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (106 commits) clk: qcom: regmap-phy-mux: Rework the implementation clk: qcom: a53: Corrected frequency multiplier for 1152MHz clk: qcom: camcc-milos: Declare icc path dependency for CAMSS_TOP_GDSC clk: qcom: gdsc: Support enabling interconnect path for power domain dt-bindings: clock: qcom,milos-camcc: Document interconnect path interconnect: Add devm_of_icc_get_by_index() as exported API for users clk: qcom: camcc-x1p42100: Add support for camera clock controller clk: qcom: camcc-x1e80100: Add support for camera QDSS debug clocks clk: qcom: videocc-x1p42100: Add support for video clock controller dt-bindings: clock: qcom: Add X1P42100 camera clock controller dt-bindings: clock: qcom: Add X1P42100 video clock controller clk: keystone: sci-clk: fix application of sizeof to pointer clk: keystone: don't cache clock rate clk: spacemit: k3: Add PCIe DBI clock dt-bindings: soc: spacemit: k3: Add PCIe DBI clock IDs clk: spacemit: k3: Fix PCIe clock register offset clk: spacemit: k3: Switch to pll2_d6 as parent for PCIe clock clk: at91: keep securam node alive while mapping it clk: samsung: exynos990: Fix PERIC0/1 USI clock types clk: renesas: r9a08g045: Drop unused pm_domain header file ...

Merge branches 'clk-microchip' and 'clk-qcom' into clk-next

2026-06-25T14:55:47+00:00

* clk-microchip: clk: at91: keep securam node alive while mapping it clk: at91: sama7d65: add peripheral clock for I3C clk: microchip: mpfs-ccc: fix peripheral driver registration failures after oob fix clk: at91: sam9x7: Fix gmac_gclk clock definition clk: at91: sam9x7: Rename macb0_clk to gmac_clk clk: at91: sam9x7: Remove gmac peripheral clock with ID 67 clk: microchip: rename clk-core to clk-pic32 * clk-qcom: (32 commits) clk: qcom: regmap-phy-mux: Rework the implementation clk: qcom: a53: Corrected frequency multiplier for 1152MHz clk: qcom: camcc-milos: Declare icc path dependency for CAMSS_TOP_GDSC clk: qcom: gdsc: Support enabling interconnect path for power domain dt-bindings: clock: qcom,milos-camcc: Document interconnect path interconnect: Add devm_of_icc_get_by_index() as exported API for users clk: qcom: camcc-x1p42100: Add support for camera clock controller clk: qcom: camcc-x1e80100: Add support for camera QDSS debug clocks clk: qcom: videocc-x1p42100: Add support for video clock controller dt-bindings: clock: qcom: Add X1P42100 camera clock controller dt-bindings: clock: qcom: Add X1P42100 video clock controller clk: qcom: nord: negcc: add support for the USB2 PHY reset dt-bindings: clock: qcom: add the definition for the USB2 PHY reset clk: qcom: clk-rpmh: Make all VRMs optional clk: qcom: Add support for global clock controller on Hawi clk: qcom: clk-alpha-pll: Add support for Taycan EHA_T PLL clk: qcom: Add Hawi TCSR clock controller driver clk: qcom: rpmh: Add support for Hawi RPMH clocks dt-bindings: clock: qcom: Add Hawi global clock controller dt-bindings: clock: qcom: Add Hawi TCSR clock controller ...

Merge branches 'clk-ti', 'clk-samsung', 'clk-rockchip' and 'clk-spacemit' into clk-next

2026-06-25T14:55:38+00:00

* clk-ti: clk: keystone: sci-clk: fix application of sizeof to pointer clk: keystone: don't cache clock rate * clk-samsung: clk: samsung: exynos990: Fix PERIC0/1 USI clock types clk: samsung: exynos850: mark APM I3C clocks as critical * clk-rockchip: clk: rockchip: allow COMPILE_TEST builds clk: rockchip: rk3588: add GATE_GRF clocks for I2S MCLK output to IO soc: rockchip: rk3588: add SYS_GRF SOC_CON6 register offset clk: rockchip: add helper to register auxiliary GRFs clk: rockchip: allow grf_type_sys lookup in aux_grf_table dt-bindings: clock: rockchip,rk3588-cru: add I2S MCLK output to IO clock IDs * clk-spacemit: clk: spacemit: k3: Add PCIe DBI clock dt-bindings: soc: spacemit: k3: Add PCIe DBI clock IDs clk: spacemit: k3: Fix PCIe clock register offset clk: spacemit: k3: Switch to pll2_d6 as parent for PCIe clock

Merge branches 'clk-renesas', 'clk-socfpga', 'clk-amlogic' and 'clk-canaan' into clk-next

2026-06-25T14:55:26+00:00

* clk-renesas: (36 commits) clk: renesas: r9a08g045: Drop unused pm_domain header file clk: renesas: r8a779g0: Add DSC clock clk: renesas: rzg2l: Rename iterator in for_each_mod_clock() to avoid shadowing clk: renesas: r9a08g045: Drop unused DEF_G3S_MUX macro clk: renesas: rzg2l: Rename RZG3L-prefixed PLL macros to CPG-prefixed ones clk: renesas: rzg3s/rzg3l: Simplify PLL configuration macro clk: renesas: rzg2l: Simplify SAM PLL configuration macro clk: renesas: r8a73a4: Add ZT/ZTR trace clocks dt-bindings: clock: renesas,cpg-clocks: Document ZT/ZTR trace clock on R-Mobile APE6 clk: renesas: r9a08g046: Add RSPI clocks and resets clk: renesas: r9a08g046: Add SSIF-2 clocks and resets clk: renesas: r9a08g046: Add RSCI clocks and resets clk: renesas: cpg-mssr: Add number of clock cells check clk: renesas: rzg2l: Refactor rzg3l_cpg_pll_clk_endisable() clk: renesas: rzg2l: Consolidate DEF_MUX() and DEF_MUX_FLAGS() clk: renesas: r9a08g046: Add IA55_PCLK to critical module clocks clk: renesas: r9a09g047: Add support for LCDC{0,1} clocks and resets clk: renesas: r9a09g047: Add support for DSI clocks and resets clk: renesas: r9a09g047: Add support for SMUX2_DSI{0,1}_CLK clk: renesas: r9a09g047: Add CLK_PLLDSI{0,1}_CSDIV clocks ... * clk-socfpga: clk: socfpga: agilex: implement l3_main_free_clk * clk-amlogic: dt-bindings: clock: amlogic: t7: Add missing mpll3 parent clock dt-bindings: clock: amlogic: Fix redundant hyphen in "amlogic,t7-gp1--pll" string. * clk-canaan: clk: canaan: Add clock driver for Canaan K230 dt-bindings: clock: Add Canaan K230 clock controller

Merge branches 'clk-cleanup', 'clk-mediatek', 'clk-marvell' and 'clk-versal' into clk-next

2026-06-25T14:55:16+00:00

* clk-cleanup: clk: hisilicon: Improve deallocation in error path clk-lpc18xx-ccu: kzalloc + kcalloc to kzalloc_flex clk: bulk: Use dev_err_probe() helper in of_clk_bulk_get() clk: bcm: iproc-asiu: simplify allocation clk: clk-max77686: kzalloc + kcalloc to kzalloc clk: visconti: pll: use kzalloc_flex clk: hisilicon: clkdivider-hi6220: use kzalloc_flex clk: mvebu: use kzalloc_flex * clk-mediatek: clk: mediatek: mt7988: use MUX_CLR_SET for gate-less muxes clk: mediatek: mt8192: use MUX_CLR_SET clk: mediatek: add MUX_CLR_SET macro * clk-marvell: clk: mmp: pxa1908-apbcp: Add reset cells clk: mmp: pxa1908-apbc: Add reset cells dt-bindings: clock: marvell,pxa1908: Add #reset-cells * clk-versal: clk: clk-axi-clkgen: Add support versal timings

Merge tag 'soc-drivers-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2026-06-17T18:21:40+00:00

Pull SoC driver updates from Arnd Bergmann: "There are a few added drivers, but mostly the normal maintenance to drivers for firmware, memory controller and other soc specific hardware: - The NXP QuickEngine gets modern MSI support, which allows some cleanups to the GICv3 irqchip chip driver - A new SoC specific driver for the Renesas R-Car MFIS unit is added, encapsulating support for the on-chip mailbox and hwspinlock implementations that are not easily separated into individual drivers - The Qualcomm SoC drivers add support for additional SoC implementations, and flexibility around power management for the serial-engine driver as well as probing the LLCC driver using custom hardware descriptions inside of the device itself. - Added support for the Samsung thermal management unit - A cleanup to the Tegra 'PMC' driver interfaces to remove legacy APIs and allow multiple PMC instances everywhere. - Updates to the TI SCI and KNAS drivers to improve suspend/resume support. - Minor driver changes for mediatek, xilinx, allwinner, aspeed, tegra, broadcom, amd, microchip and starfive specific drivers - Memory controller updates for Tegra and Renesas for additional SoC types and other improvements. - Firmware driver updates for Arm FF-A, SMCCC and SCMI interfaces, to update driver probing, object lifetimes and address minor bugs" * tag 'soc-drivers-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (189 commits) Revert "firmware: zynqmp: Add dynamic CSU register discovery and sysfs interface" Revert "Documentation: ABI: add sysfs interface for ZynqMP CSU registers" memory: tegra234: drop dead NULL check in tegra234_mc_icc_aggregate() memory: tegra264: drop redundant tegra264_mc_icc_aggregate() memory: tegra186-emc: stop borrowing MC aggregate hook for EMC soc: aspeed: cleanup dead default for ASPEED_SOCINFO firmware: tegra: bpmp: Add support for multi-socket platforms firmware: tegra: bpmp: Propagate debugfs errors soc/tegra: pmc: Add Tegra238 support soc/tegra: pmc: Restrict power-off handler to Nexus 7 soc/tegra: pmc: Populate powergate debugfs only when needed soc/tegra: pmc: Move legacy code behind CONFIG_ARM guard soc/tegra: pmc: Remove unused legacy functions soc/tegra: pmc: Create PMC context dynamically firmware: samsung: acpm: remove compile-testing stubs firmware: samsung: acpm: Add devm_acpm_get_by_phandle helper firmware: samsung: acpm: Add TMU protocol support firmware: samsung: acpm: Make acpm_ops const and access via pointer firmware: samsung: acpm: Drop redundant _ops suffix in acpm_ops members firmware: samsung: acpm: Annotate rx_data->cmd with __counted_by_ptr ...

Merge tag 'clk-microchip-fixes-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into clk-microchip

2026-06-13T21:10:42+00:00

Pull Microchip clock fixes from Claudiu Beznea: - Fix the GMAC GCLK clock ID for the SAM9X7 SoC - Properly decrement the reference count of a struct device_node in pmc_register_ops() after it is no longer needed - Fix the MPFS peripheral driver registration failures by using the proper size and mapping for the output clocks array [sboyd@kernel.org: These all look non-critical so not taking for clk-fixes] * tag 'clk-microchip-fixes-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: clk: at91: keep securam node alive while mapping it clk: microchip: mpfs-ccc: fix peripheral driver registration failures after oob fix clk: at91: sam9x7: Fix gmac_gclk clock definition

Merge tag 'ti-driver-soc-for-v7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/drivers

2026-06-09T14:59:20+00:00

TI SoC driver updates for v7.2 TI K3 TISCI: - ti_sci: Add BOARDCFG_MANAGED mode for support system suspend/resume cycles - ti_sci: Add support for restoring IRQ and clock contexts during resume. - clk: keystone: sci-clk: Add clock restoration support. SoC Drivers: - k3-socinfo: Add support for identifying AM62P silicon variants via NVMEM, along with corresponding dt-bindings update for nvmem-cells support - k3-ringacc: Fix incorrect access mode for ring pop tail IO/proxy operations Keystone Navigator (knav) Cleanup and Fixes: - knav_qmss: Multiple code quality improvements - knav_qmss_queue: Implement proper resource cleanup in the remove() path General Cleanups: - k3-ringacc: Use str_enabled_disabled() helper for consistency - knav_qmss: Use %pe format specifier for PTR_ERR() printing * tag 'ti-driver-soc-for-v7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: firmware: ti_sci: Add support for restoring clock context during resume clk: keystone: sci-clk: Add restore_context() operation firmware: ti_sci: Add support for restoring IRQs during resume firmware: ti_sci: Add BOARDCFG_MANAGED mode support soc: ti: k3-ringacc: Use str_enabled_disabled() helper soc: ti: knav_dma: Use IOMEM_ERR_PTR() in pktdma_get_regs() soc: ti: knav_dma: Remove dead check on unsigned args.args[0] soc: ti: knav_dma: Remove unused DMA_PRIO_MASK macro soc: ti: knav_qmss_acc: Fix kernel-doc Return: tag soc: ti: knav_qmss: Fix __iomem annotations and __be32 type soc: ti: knav_qmss: Use %pe to print PTR_ERR() soc: ti: knav_qmss: Fix kernel-doc Return: tags soc: ti: knav_qmss: Inline lockdep condition in for_each_handle_rcu soc: ti: knav_qmss: Rename global kdev to knav_qdev to fix -Wshadow soc: ti: knav_qmss: Remove remaining redundant ENOMEM printks soc: ti: knav_qmss_queue: Implement resource cleanup in remove() soc: ti: k3-ringacc: Fix access mode for k3_ringacc_ring_pop_tail_io/proxy soc: ti: knav_dma: fix all kernel-doc warnings in knav_dma.h soc: ti: k3-socinfo: Add support for AM62P variants via NVMEM dt-bindings: hwinfo: ti,k3-socinfo: Add nvmem-cells support Signed-off-by: Arnd Bergmann

Merge tag 'samsung-drivers-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers

2026-06-09T14:51:26+00:00

Samsung SoC drivers for v7.2 Improve Samsung Exynos (and Google GS101) ACPM (Alive Clock and Power Manager) firmware driver: 1. Few code improvements. 2. Add support for protocol used to communicate with Thermal Management Unit (TMU). This will allow to implement the thermal driver working for newer Samsung Exynos and Google GS101 SoCs. * tag 'samsung-drivers-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: firmware: samsung: acpm: remove compile-testing stubs firmware: samsung: acpm: Add devm_acpm_get_by_phandle helper firmware: samsung: acpm: Add TMU protocol support firmware: samsung: acpm: Make acpm_ops const and access via pointer firmware: samsung: acpm: Drop redundant _ops suffix in acpm_ops members firmware: samsung: acpm: Annotate rx_data->cmd with __counted_by_ptr firmware: samsung: acpm: Consolidate transfer initialization helper firmware: samsung: acpm: Fix infinite loop on sequence number exhaustion firmware: samsung: acpm: Fix missing LKMM barriers in sequence allocator firmware: samsung: acpm: Fix false timeouts and Use-After-Free in polling firmware: samsung: acpm: Fix mailbox channel leak on probe error firmware: samsung: acpm: Fix cross-thread RX length corruption Signed-off-by: Arnd Bergmann

clk: qcom: regmap-phy-mux: Rework the implementation

2026-06-08T14:17:24+00:00

The sole reason this hw exists is to let the branch clock downstream of it keep running, with the PHY disengaged. This is not possible with the current implementation, as the enabled status is hijacked to mean "enabled" = "use fast/PHY source" and "disabled" = "use XO source". This is an issue, since the mux enable state follows that of the child branch, making the desired "child enabled, MUX @ XO" combination impossible. Solve that by implementing ratesetting. Because PHY clock rates may change at runtime and aren't really deterministic from Linux, assume ULONG_MAX as "fast clock" and 19.2 MHz as XO. All the branches in question already set CLK_SET_RATE_PARENT, so everything works out. Signed-off-by: Konrad Dybcio Link: https://lore.kernel.org/r/20260409-topic-phy_fastclk-v1-1-6b4aaee56b90@oss.qualcomm.com Signed-off-by: Bjorn Andersson