kernel/linux.git/drivers/clk/ti, branch v6.12.80

clk: ti: am33xx: keep WKUP_DEBUGSS_CLKCTRL enabled

2025-11-13T20:34:34+00:00

[ Upstream commit 1e0d75258bd09323cb452655549e03975992b29e ] As described in AM335x Errata Advisory 1.0.42, WKUP_DEBUGSS_CLKCTRL can't be disabled - the clock module will just be stuck in transitioning state forever, resulting in the following warning message after the wait loop times out: l3-aon-clkctrl:0000:0: failed to disable Just add the clock to enable_init_clks, so no attempt is made to disable it. Signed-off-by: Matthias Schiffer Signed-off-by: Alexander Stein Acked-by: Kevin Hilman Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin

clk: Switch back to struct platform_driver::remove()

2024-09-21T21:12:05+00:00

After commit 0edb555a65d1 ("platform: Make platform_driver::remove() return void") .remove() is (again) the right callback to implement for platform drivers. Convert all clk drivers to use .remove(), with the eventual goal to drop struct platform_driver::remove_new(). As .remove() and .remove_new() have the same prototypes, conversion is done by just changing the structure member name in the driver initializer. Signed-off-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20240909144026.870565-2-u.kleine-koenig@baylibre.com Acked-by: Geert Uytterhoeven # renesas Signed-off-by: Stephen Boyd

clk: ti: dra7-atl: Fix leak of of_nodes

2024-08-28T20:17:30+00:00

This fix leaking the of_node references in of_dra7_atl_clk_probe(). The docs for of_parse_phandle_with_args() say that the caller must call of_node_put() on the returned node. This adds the missing of_node_put() to fix the leak. Fixes: 9ac33b0ce81f ("CLK: TI: Driver for DRA7 ATL (Audio Tracking Logic)") Signed-off-by: David Lechner Link: https://lore.kernel.org/r/20240826-clk-fix-leak-v1-1-f55418a13aa6@baylibre.com Signed-off-by: Stephen Boyd

clk: ti: dpll: fix incorrect #ifdef checks

2024-04-05T21:13:22+00:00

Building with W=1 shows warnings about unused const variables like this one: drivers/clk/ti/dpll.c:99:29: error: unused variable 'omap3_dpll_core_ck_ops' [-Werror,-Wunused-const-variable] static const struct clk_ops omap3_dpll_core_ck_ops = {}; The problem is that the #ifdef checks for some of the structures in this file have gone out of sync with the code referencing them. Update these to match the current usage. Signed-off-by: Arnd Bergmann Link: https://lore.kernel.org/r/20240403080702.3509288-12-arnd@kernel.org Reviewed-by: Tony Lindgren Signed-off-by: Stephen Boyd

Merge tag 'soc-late-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2024-03-19T18:57:26+00:00

Pull more ARM SoC updates from Arnd Bergmann: "These are changes that for some reason ended up not making it into the first four branches but that should still make it into 6.9: - A rework of the omap clock support that touches both drivers and device tree files - The reset controller branch changes that had a dependency on late bugfixes. Merging them here avoids a backmerge of 6.8-rc5 into the drivers branch - The RISC-V/starfive, RISC-V/microchip and ARM/Broadcom devicetree changes that got delayed and needed some extra time in linux-next for wider testing" * tag 'soc-late-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (31 commits) soc: fsl: dpio: fix kcalloc() argument order bus: ts-nbus: Improve error reporting bus: ts-nbus: Convert to atomic pwm API riscv: dts: starfive: jh7110: Add camera subsystem nodes ARM: bcm: stop selecing CONFIG_TICK_ONESHOT ARM: dts: omap3: Update clksel clocks to use reg instead of ti,bit-shift ARM: dts: am3: Update clksel clocks to use reg instead of ti,bit-shift clk: ti: Improve clksel clock bit parsing for reg property clk: ti: Handle possible address in the node name dt-bindings: pwm: opencores: Add compatible for StarFive JH8100 dt-bindings: riscv: cpus: reg matches hart ID reset: Instantiate reset GPIO controller for shared reset-gpios reset: gpio: Add GPIO-based reset controller cpufreq: do not open-code of_phandle_args_equal() of: Add of_phandle_args_equal() helper reset: simple: add support for Sophgo SG2042 dt-bindings: reset: sophgo: support SG2042 riscv: dts: microchip: add specific compatible for mpfs pdma riscv: dts: microchip: add missing CAN bus clocks ARM: brcmstb: Add debug UART entry for 74165 ...

clk: ti: dpll3xxx: use correct function names in kernel-doc

2024-02-28T23:19:03+00:00

Use function names that match the implementation in kernel-doc comments to avoid kernel-doc warnings: dpll3xxx.c:938: warning: expecting prototype for omap3_non_core_dpll_save_context(). Prototype was for omap3_noncore_dpll_save_context() instead dpll3xxx.c:967: warning: expecting prototype for omap3_core_dpll_restore_context(). Prototype was for omap3_noncore_dpll_restore_context() instead Signed-off-by: Randy Dunlap Cc: Tero Kristo Cc: linux-omap@vger.kernel.org Cc: Michael Turquette Cc: Stephen Boyd Cc: linux-clk@vger.kernel.org Link: https://lore.kernel.org/r/20240115054739.4988-1-rdunlap@infradead.org Signed-off-by: Stephen Boyd

clk: ti: Improve clksel clock bit parsing for reg property

2024-02-26T11:08:45+00:00

Because of legacy reasons, the TI clksel composite clocks can have overlapping reg properties, and use a custom ti,bit-shift property. For the clksel clocks we can start using of the standard reg property instead of the custom ti,bit-shift property. To do this, let's add a ti_clk_get_legacy_bit_shift() helper, and make ti_clk_get_reg_addr() populate the clock bit offset. This makes it possible to update the devicetree files to use the reg property one clock at a time. Acked-by: Stephen Boyd Signed-off-by: Tony Lindgren

clk: ti: Handle possible address in the node name

2024-02-26T11:08:24+00:00

In order to use #address-cells = <1> and start making use of the standard reg property, let's prepare things to ignore the possible address in the clock node name. Unless the clock-output-names property is used, the legacy clocks still fall back to matching the clock data based on the node name. We use cleanup.h to simplify the return path for freeing tmp. Acked-by: Stephen Boyd Signed-off-by: Tony Lindgren

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

2023-11-01T04:42:56+00:00

Pull clk driver updates from Stephen Boyd: "Herein lies a smallish collection of clk driver updates and some core clk framework changes for the merge window. The core framework changes are only improving the debugfs interface to allow phase adjustments and report which consumers of a clk there are. These are most likely only of interest to kernel developers. On the clk driver side, it's a ghastly amount of updates with only a handful of new clk drivers. We have a couple new clk drivers for Qualcomm, per usual, and a driver for Renesas, Amlogic, and TI respectively. The updates are spread throughout the clk drivers. Some highlights are fixing kunit tests for different configurations like lockdep and big-endian, avoiding integer overflow in rate settable clks, moving clk_hw_onecell_data to the end of allocations so that drivers don't corrupt their private data, and migrating clk drivers to the regmap maple tree. Otherwise it's the usual fixes to clk drivers that only come along with testing the drivers on real hardware. New Drivers: - Add clock driver for TWL6032 - Initial support for the Qualcomm SM4450 Global Clock Controller and SM4450 RPMh clock controllers - Add Camera Clock Controller on Qualcomm SM8550 - Add support for the Renesas RZ/G3S (R9A08G045) SoC - Add Amlogic s4 main clock controller support Updates: - Make clk kunit tests work with lockdep - Fix clk gate kunit test for big-endian - Convert more than a handful of clk drivers to use regmap maple tree - Consider the CLK_FRAC_DIVIDER_ZERO_BASED in fractional divider clk implementation - Add consumer info to clk debugfs - Fix various clk drivers that have clk_hw_onecell_data not at the end of an allocation - Drop CLK_SET_RATE_PARENT for clocks with fixed-rate GPLLs across a variety of Qualcomm IPQ platforms - Add missing parent of APCS PLL on Qualcomm IPQ6018 - Add I2C QUP6 clk on Qualcomm IPQ6018 but mark it critical to avoid problems with RPM - Implement safe source switching for a53pll and use on Qualcomm IPQ5332 - Add support for Stromer Plus PLLs to Qualcomm clk driver - Switch Qualcomm SM8550 Video and GPU clock controllers to use OLE PLL configure method - Non critical fixes to halt bit checks in Qualcomm clk drivers - Add SMMU GDSC for Qualcomm MSM8998 - Fix possible integer overflow in Qualcomm RCG frequency calculation code - Remove RPM managed clks from Qualcomm MSM8996 GCC driver - Add HFPLL configuration for the three HFPLLs in Qualcomm MSM8976 - Switch Qualcomm MSM8996 CBF clock driver's remove function to return void - Fix missing dependency for s4 clock controllers - Select MXC_CLK when building in the CLK_IMX8QXP - Fixes for error handling paths in i.MX8 ACM driver - Move the clocks check in i.MX8 ACM driver in order to log any error - Drop the unused return value of clk_imx_acm_detach_pm_domains - Drop non-existant IMX8MP_CLK_AUDIOMIX_PDM_ROOT clock - Fix error handling in i.MX8MQ clock driver - Allow a different LCDIF1 clock parent if DT describes it for i.MX6SX - Keep the SCU resource table sorted in the i.MX8DXL rsrc driver - Move the elcdif PLL clock registration above lcd_clk, as it is its parent - Correct some ENET specific clocks for i.MX8DXL platform - Drop the VPU_UART and VPUCORE from i.MX8QM as latest HW revision doesn't have them - Remove "de-featured" MLB support from i.MX8QM/QXP/DXL platforms - Skip registering clocks owned by Cortex-A partition SCU-based platforms - Add CAN_1/2 to i.MX8QM and M4_0, PI_0_PWM_0 and PI_0_I2C_0 to i.MX8QXP resources" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (128 commits) clk: Fix clk gate kunit test on big-endian CPUs clk: si521xx: Increase stack based print buffer size in probe clk: mediatek: fix double free in mtk_clk_register_pllfh() clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock_data clk: socfpga: Fix undefined behavior bug in struct stratix10_clock_data clk: sifive: Allow building the driver as a module clk: analogbits: Allow building the library as a module clk: sprd: Composite driver support offset config clk: Allow phase adjustment from debugfs clk: Show active consumers of clocks in debugfs clk: Use device_get_match_data() clk: visconti: Add bounds-checking coverage for struct visconti_pll_provider clk: visconti: Fix undefined behavior bug in struct visconti_pll_provider clk: cdce925: Extend match support for OF tables clk: si570: Simplify probe clk: si5351: Simplify probe clk: rs9: Use i2c_get_match_data() instead of device_get_match_data() clk: clk-si544: Simplify probe() and is_valid_frequency() clk: si521xx: Use i2c_get_match_data() instead of device_get_match_data() clk: meson: S4: select CONFIG_COMMON_CLK_MESON_CLKC_UTILS ...

clk: Use device_get_match_data()

2023-10-24T03:16:21+00:00

Use preferred device_get_match_data() instead of of_match_device() to get the driver match data. With this, adjust the includes to explicitly include the correct headers. Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20231006213959.334439-1-robh@kernel.org Reviewed-by: Dmitry Baryshkov #msm part Acked-by: Krzysztof Kozlowski # Samsung Acked-by: David Lechner Acked-by: Chanwoo Choi Acked-by: Charles Keepax Reviewed-by: Bjorn Andersson Signed-off-by: Stephen Boyd