kernel/linux.git/drivers/clk/thead, branch v6.12.80

clk: thead: Mark essential bus clocks as CLK_IGNORE_UNUSED

2025-08-20T16:30:43+00:00

[ Upstream commit 0370395d45ca6dd53bb931978f0e91ac8dd6f1c5 ] Probing peripherals in the AON and PERI domains, such as the PVT thermal sensor and the PWM controller, can lead to boot hangs or unresponsive devices on the LPi4A board. The root cause is that their parent bus clocks ('CLK_CPU2AON_X2H' and the 'CLK_PERISYS_APB' clocks) are automatically gated by the kernel's power-saving mechanisms when the bus is perceived as idle. Alternative solutions were investigated, including modeling the parent bus in the Device Tree with 'simple-pm-bus' or refactoring the clock driver's parentage. The 'simple-pm-bus' approach is not viable due to the lack of defined bus address ranges in the hardware manual and its creation of improper dependencies on the 'pm_runtime' API for consumer drivers. Therefore, applying the'`CLK_IGNORE_UNUSED' flag directly to the essential bus clocks is the most direct and targeted fix. This prevents the kernel from auto-gating these buses and ensures peripherals remain accessible. This change fixes the boot hang associated with the PVT sensor and resolves the functional issues with the PWM controller. Link: https://lore.kernel.org/all/9e8a12db-236d-474c-b110-b3be96edf057@samsung.com/ [1] Reviewed-by: Drew Fustini Acked-by: Stephen Boyd Signed-off-by: Michal Wilczynski Signed-off-by: Drew Fustini Signed-off-by: Sasha Levin

clk: thead: th1520-ap: Correctly refer the parent of osc_12m

2025-08-15T10:13:54+00:00

[ Upstream commit d274c77ffa202b70ad01d579f33b73b4de123375 ] The "osc_12m" fixed factor clock refers the external oscillator by setting clk_parent_data.fw_name to osc_24m, which is obviously wrong since no clock-names property is allowed for compatible thead,th1520-clk-ap. Refer the oscillator as parent by index instead. Fixes: ae81b69fd2b1 ("clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks") Signed-off-by: Yao Zi Reviewed-by: Drew Fustini Signed-off-by: Drew Fustini Signed-off-by: Sasha Levin

clk: thead: Fix cpu2vp_clk for TH1520 AP_SUBSYS clocks

2025-02-08T08:57:15+00:00

[ Upstream commit 3a43cd19f1b8d3f57f835ae50cc869f07902c062 ] cpu2vp_clk is a gate but was mistakenly in th1520_div_clks[] instead of th1520_gate_clks[]. Fixes: ae81b69fd2b1 ("clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks") Signed-off-by: Drew Fustini Link: https://lore.kernel.org/r/20241228034802.1573554-1-dfustini@tenstorrent.com Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin

clk: thead: Add CLK_IGNORE_UNUSED to fix TH1520 boot

2025-02-08T08:57:15+00:00

[ Upstream commit 037705e94bf6e1810b7f9dc077d0e23292229e74 ] Add the CLK_IGNORE_UNUSED flag to apb_pclk, cpu2peri_x2h_clk, perisys_apb2_hclk and perisys_apb3_hclk. Without this flag, the boot hangs after "clk: Disabling unused clocks" unless clk_ignore_unused is in the kernel cmdline. Fixes: ae81b69fd2b1 ("clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks") Signed-off-by: Drew Fustini Link: https://lore.kernel.org/r/20250113-th1520-clk_ignore_unused-v1-2-0b08fb813438@tenstorrent.com Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin

clk: thead: Fix clk gate registration to pass flags

2025-02-08T08:57:15+00:00

[ Upstream commit a826e53fd78c7f07b8ff83446c44b227b2181920 ] Modify the call to devm_clk_hw_register_gate_parent_data() to actually pass the clk flags from hw.init instead of just 0. This is necessary to allow individual clk gates to specify their own clk flags. Fixes: ae81b69fd2b1 ("clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks") Signed-off-by: Drew Fustini Link: https://lore.kernel.org/r/20250113-th1520-clk_ignore_unused-v1-1-0b08fb813438@tenstorrent.com Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin

clk: thead: Fix TH1520 emmc and shdci clock rate

2025-01-09T12:33:47+00:00

[ Upstream commit f4bf0b909a6bf64a2220a42a7c8b8c2ee1b77b89 ] In accordance with LicheePi 4A BSP the clock that comes to emmc/sdhci is 198Mhz which is got through frequency division of source clock VIDEO PLL by 4 [1]. But now the AP_SUBSYS driver sets the CLK EMMC SDIO to the same frequency as the VIDEO PLL, equal to 792 MHz. This causes emmc/sdhci to work 4 times slower. Let's fix this issue by adding fixed factor clock that divides VIDEO PLL by 4 for emmc/sdhci. Link: https://github.com/revyos/thead-kernel/blob/7563179071a314f41cdcdbfd8cf6e101e73707f3/drivers/clk/thead/clk-light-fm.c#L454 Fixes: ae81b69fd2b1 ("clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks") Signed-off-by: Maksim Kiselev Link: https://lore.kernel.org/r/20241210083029.92620-1-bigunclemax@gmail.com Tested-by: Xi Ruoyao Reviewed-by: Drew Fustini Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin

clk: thead: fix dependency on clk_ignore_unused

2024-07-31T21:51:47+00:00

Add the CLK_IGNORE_UNUSED flag to the vp-axi clock (CLK_VP_AXI) to avoid depending on clk_ignore_unused in the cmdline. Without this fix, the emmc-sdio clock (CLK_EMMC_SDIO) fails to work after vp-axi is disabled. Signed-off-by: Drew Fustini Link: https://lore.kernel.org/r/20240731061439.3807172-1-drew@pdp7.com Fixes: ae81b69fd2b1 ("clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks") Signed-off-by: Stephen Boyd

clk: T-Head: Disable on 32-bit Targets

2024-07-22T21:29:23+00:00

This fails to build on 32-bit targets because of a missing __udivdi3. IIRC the right way to fix that is to avoid the division, but I just want a tree that builds and the only real T-Head platforms are 64-bit right now. Signed-off-by: Palmer Dabbelt Link: https://lore.kernel.org/r/20240719151027.16152-1-palmer@rivosinc.com Acked-by: Drew Fustini Signed-off-by: Stephen Boyd

clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks

2024-07-15T19:15:01+00:00

Add support for the AP sub-system clock controller in the T-Head TH1520. This include CPU, DPU, GMAC and TEE PLLs. Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf Co-developed-by: Yangtao Li Signed-off-by: Yangtao Li Co-developed-by: Jisheng Zhang Signed-off-by: Jisheng Zhang Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs Signed-off-by: Drew Fustini Link: https://lore.kernel.org/r/20240711-th1520-clk-v3-2-6ff17bb318fb@tenstorrent.com Signed-off-by: Stephen Boyd