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<title>kernel/linux.git/drivers/clk/tegra, branch v3.18.62</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v3.18.62</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v3.18.62'/>
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<updated>2015-05-17T23:12:18+00:00</updated>
<entry>
<title>clk: tegra: Register the proper number of resets</title>
<updated>2015-05-17T23:12:18+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2015-03-23T09:57:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=06714fcfc019dfb9ff90cf5c1e450c54bf0a4ed3'/>
<id>urn:sha1:06714fcfc019dfb9ff90cf5c1e450c54bf0a4ed3</id>
<content type='text'>
[ Upstream commit 5e43e259171e1eee8bc074d9c44be434e685087b ]

The number of resets controls is 32 times the number of peripheral
register banks rather than 32 times the number of clocks. This reduces
(drastically) the number of reset controls registered from 10080 (315
clocks * 32) to 224 (6 peripheral register banks * 32).

This also fixes a potential crash because trying to use any of the
excess reset controls (224-10079) would have caused accesses beyond
the array bounds of the peripheral register banks definition array.

Cc: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Cc: Prashant Gaikwad &lt;pgaikwad@nvidia.com&gt;
Fixes: 6d5b988e7dc5 ("clk: tegra: implement a reset driver")
Cc: stable@vger.kernel.org # 3.14+
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
</content>
</entry>
<entry>
<title>clk: tegra: Make clock initialization more robust</title>
<updated>2014-09-18T11:56:53+00:00</updated>
<author>
<name>Tomeu Vizoso</name>
<email>tomeu.vizoso@collabora.com</email>
</author>
<published>2014-09-17T09:34:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b9e742c3164344fece3615aca42ec51b41753908'/>
<id>urn:sha1:b9e742c3164344fece3615aca42ec51b41753908</id>
<content type='text'>
Don't abort clock initialization if we cannot match an entry in
tegra_clk_init_table to a valid entry in the clk array.

Also log a corresponding error message.

This was discovered when testing a patch that removed the EMC clock from
tegra124_clks but left a mention in tegra_clk_init_table.

Signed-off-by: Tomeu Vizoso &lt;tomeu.vizoso@collabora.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>clk: tegra124: Add PLL_M_UD and PLL_C_UD clocks</title>
<updated>2014-09-18T10:57:12+00:00</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2014-07-11T14:18:29+00:00</published>
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<id>urn:sha1:4c495c204f794125db11e74bd61228901b0acaa7</id>
<content type='text'>
These clocks are used as parents for some EMC timings.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2014-08-08T18:00:26+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2014-08-08T18:00:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=44c916d58b9ef1f2c4aec2def57fa8289c716a60'/>
<id>urn:sha1:44c916d58b9ef1f2c4aec2def57fa8289c716a60</id>
<content type='text'>
Pull ARM SoC cleanups from Olof Johansson:
 "This merge window brings a good size of cleanups on various platforms.
  Among the bigger ones:

   - Removal of Samsung s5pc100 and s5p64xx platforms.  Both of these
     have lacked active support for quite a while, and after asking
     around nobody showed interest in keeping them around.  If needed,
     they could be resurrected in the future but it's more likely that
     we would prefer reintroduction of them as DT and
     multiplatform-enabled platforms instead.

   - OMAP4 controller code register define diet.  They defined a lot of
     registers that were never actually used, etc.

   - Move of some of the Tegra platform code (PMC, APBIO, fuse,
     powergate) to drivers/soc so it can be shared with 64-bit code.
     This also converts them over to traditional driver models where
     possible.

   - Removal of legacy gpio-samsung driver, since the last users have
     been removed (moved to pinctrl)

  Plus a bunch of smaller changes for various platforms that sort of
  dissapear in the diffstat for the above.  clps711x cleanups, shmobile
  header file refactoring/moves for multiplatform friendliness, some
  misc cleanups, etc"

* tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (117 commits)
  drivers: CCI: Correct use of ! and &amp;
  video: clcd-versatile: Depend on ARM
  video: fix up versatile CLCD helper move
  MAINTAINERS: Add sdhci-st file to ARCH/STI architecture
  ARM: EXYNOS: Fix build breakge with PM_SLEEP=n
  MAINTAINERS: Remove Kirkwood
  ARM: tegra: Convert PMC to a driver
  soc/tegra: fuse: Set up in early initcall
  ARM: tegra: Always lock the CPU reset vector
  ARM: tegra: Setup CPU hotplug in a pure initcall
  soc/tegra: Implement runtime check for Tegra SoCs
  soc/tegra: fuse: fix dummy functions
  soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
  soc/tegra: Add efuse and apbmisc bindings
  soc/tegra: Add efuse driver for Tegra
  ARM: tegra: move fuse exports to soc/tegra/fuse.h
  ARM: tegra: export apb dma readl/writel
  ARM: tegra: Use a function to get the chip ID
  ARM: tegra: Sort includes alphabetically
  ARM: tegra: Move includes to include/soc/tegra
  ...
</content>
</entry>
<entry>
<title>ARM: tegra: Convert PMC to a driver</title>
<updated>2014-07-17T12:58:43+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-07-11T11:19:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7232398abc6a7186e315425638c367d50c674718'/>
<id>urn:sha1:7232398abc6a7186e315425638c367d50c674718</id>
<content type='text'>
This commit converts the PMC support code to a platform driver. Because
the boot process needs to call into this driver very early, also set up
a minimal environment via an early initcall.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: Move includes to include/soc/tegra</title>
<updated>2014-07-17T11:26:47+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-07-17T11:17:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=306a7f9139318a28063282a15b9f9ebacf09c9b9'/>
<id>urn:sha1:306a7f9139318a28063282a15b9f9ebacf09c9b9</id>
<content type='text'>
In order to not clutter the include/linux directory with SoC specific
headers, move the Tegra-specific headers out into a separate directory.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>clk: tegra: Use XUSB-compatible SATA PLL sequence</title>
<updated>2014-07-08T08:29:55+00:00</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2014-07-08T07:30:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0e548d50b95b59ccf123984bc44f17da72b12cdd'/>
<id>urn:sha1:0e548d50b95b59ccf123984bc44f17da72b12cdd</id>
<content type='text'>
Use a sequence for enabling hardware control of the SATA PLL
that works both when using the SATA lane with SATA and when
using it with XUSB.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
</content>
</entry>
<entry>
<title>clk: tegra: export clock names for debugging</title>
<updated>2014-06-30T13:51:45+00:00</updated>
<author>
<name>Peter De Schrijver</name>
<email>pdeschrijver@nvidia.com</email>
</author>
<published>2014-06-26T15:36:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9f0030c8ad0ce357e8fc8c71ec6b4958041afccf'/>
<id>urn:sha1:9f0030c8ad0ce357e8fc8c71ec6b4958041afccf</id>
<content type='text'>
When writing a module for testing or debugging purposes, there is no way to
get hold of clk handles. This patch solves this by exposing all valid clocks
as clkdev's for the virtual device tegra-clk-debug.

Signed-off-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
</content>
</entry>
<entry>
<title>clk: tegra124: init table updates</title>
<updated>2014-06-27T13:21:44+00:00</updated>
<author>
<name>Peter De Schrijver</name>
<email>pdeschrijver@nvidia.com</email>
</author>
<published>2014-06-04T13:37:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0a7eec7f59b8cfccb381c0c43a6a441befe8058c'/>
<id>urn:sha1:0a7eec7f59b8cfccb381c0c43a6a441befe8058c</id>
<content type='text'>
Ensure some clocks critical for system operation are always. Also enable csite
for JTAG debugging and set the tsensor and soc_therm clock frequencies for the
upcoming soctherm driver.

Signed-off-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
</content>
</entry>
<entry>
<title>clk: tegra: Add SATA clocks to Tegra124 initialization table</title>
<updated>2014-06-25T16:12:39+00:00</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2014-06-18T14:23:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cb44cc2f48371e002eaead79e6fb77a4fc71e40f'/>
<id>urn:sha1:cb44cc2f48371e002eaead79e6fb77a4fc71e40f</id>
<content type='text'>
This adds two clocks, SATA and SATA_OOB, to the Tegra124 clock initialization
table. The clocks are needed for working SATA support.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
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