<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/clk/starfive/Kconfig, branch linux-7.0.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2023-07-19T17:08:05+00:00</updated>
<entry>
<title>clk: starfive: Add StarFive JH7110 Video-Output clock driver</title>
<updated>2023-07-19T17:08:05+00:00</updated>
<author>
<name>Xingyu Wu</name>
<email>xingyu.wu@starfivetech.com</email>
</author>
<published>2023-07-13T11:38:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=dae5448a327edef952faaf31bb3aedb0597ba62a'/>
<id>urn:sha1:dae5448a327edef952faaf31bb3aedb0597ba62a</id>
<content type='text'>
Add driver for the StarFive JH7110 Video-Output clock controller.
And these clock controllers should power on and enable the clocks from
SYSCRG first before registering.

Acked-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Reviewed-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;
Reviewed-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
Signed-off-by: Xingyu Wu &lt;xingyu.wu@starfivetech.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver</title>
<updated>2023-07-19T17:08:05+00:00</updated>
<author>
<name>Xingyu Wu</name>
<email>xingyu.wu@starfivetech.com</email>
</author>
<published>2023-07-13T11:38:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=81279f5d0812e154239789e6f0295ea3b25c0d46'/>
<id>urn:sha1:81279f5d0812e154239789e6f0295ea3b25c0d46</id>
<content type='text'>
Add driver for the StarFive JH7110 Image-Signal-Process clock controller.
And these clock controllers should power on and enable the clocks from
SYSCRG before registering.

Acked-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Reviewed-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;
Reviewed-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
Signed-off-by: Xingyu Wu &lt;xingyu.wu@starfivetech.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>clk: starfive: Add StarFive JH7110 System-Top-Group clock driver</title>
<updated>2023-07-19T17:08:05+00:00</updated>
<author>
<name>Emil Renner Berthing</name>
<email>emil.renner.berthing@canonical.com</email>
</author>
<published>2023-07-13T11:38:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7c53b44bcbfd052543704d5cca7ae996beb914eb'/>
<id>urn:sha1:7c53b44bcbfd052543704d5cca7ae996beb914eb</id>
<content type='text'>
Add driver for the StarFive JH7110 System-Top-Group clock controller.

Acked-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Reviewed-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
Co-developed-by: Xingyu Wu &lt;xingyu.wu@starfivetech.com&gt;
Signed-off-by: Xingyu Wu &lt;xingyu.wu@starfivetech.com&gt;
Signed-off-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>clk: starfive: jh7110-sys: Add PLL clocks source from DTS</title>
<updated>2023-07-19T17:08:00+00:00</updated>
<author>
<name>Xingyu Wu</name>
<email>xingyu.wu@starfivetech.com</email>
</author>
<published>2023-07-17T02:30:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a013e9818734ade52944e73f64242633c6cd4128'/>
<id>urn:sha1:a013e9818734ade52944e73f64242633c6cd4128</id>
<content type='text'>
Modify PLL clocks source to be got from DTS or
the fixed factor clocks.

Signed-off-by: Xingyu Wu &lt;xingyu.wu@starfivetech.com&gt;
Reviewed-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>clk: starfive: Add StarFive JH7110 PLL clock driver</title>
<updated>2023-07-19T17:08:00+00:00</updated>
<author>
<name>Xingyu Wu</name>
<email>xingyu.wu@starfivetech.com</email>
</author>
<published>2023-07-17T02:30:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=616bc1dea1ac8909dfcd6d32802df6fe50eddde8'/>
<id>urn:sha1:616bc1dea1ac8909dfcd6d32802df6fe50eddde8</id>
<content type='text'>
Add driver for the StarFive JH7110 PLL clock controller
and they work by reading and setting syscon registers.

Co-developed-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;
Signed-off-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;
Signed-off-by: Xingyu Wu &lt;xingyu.wu@starfivetech.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>clk: starfive: Fix RESET_STARFIVE_JH7110 can't be selected in a specified case</title>
<updated>2023-05-03T01:34:49+00:00</updated>
<author>
<name>Hal Feng</name>
<email>hal.feng@starfivetech.com</email>
</author>
<published>2023-04-18T12:37:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=31c6ed4e89187beef8fe2f979c8881ca94839427'/>
<id>urn:sha1:31c6ed4e89187beef8fe2f979c8881ca94839427</id>
<content type='text'>
When (ARCH_STARFIVE [=n] &amp;&amp; COMPILE_TEST [=y] &amp;&amp; RESET_CONTROLLER [=n]),
RESET_STARFIVE_JH7110 can't be selected by CLK_STARFIVE_JH7110_SYS
and CLK_STARFIVE_JH7110_AON.

Add a condition `if RESET_CONTROLLER` to fix it. Also, delete redundant
selected options of CLK_STARFIVE_JH7110_AON because these options are
already selected by the dependency.

Fixes: edab7204afe5 ("clk: starfive: Add StarFive JH7110 system clock driver")
Fixes: b2ab3c94f41f ("clk: starfive: Add StarFive JH7110 always-on clock driver")
Signed-off-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
Link: https://lore.kernel.org/r/20230418123756.62495-2-hal.feng@starfivetech.com
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: starfive: Add StarFive JH7110 always-on clock driver</title>
<updated>2023-04-05T14:44:18+00:00</updated>
<author>
<name>Emil Renner Berthing</name>
<email>kernel@esmil.dk</email>
</author>
<published>2023-04-01T11:19:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b2ab3c94f41f888f9bec6ac6bf75935e2e2e253a'/>
<id>urn:sha1:b2ab3c94f41f888f9bec6ac6bf75935e2e2e253a</id>
<content type='text'>
Add driver for the StarFive JH7110 always-on clock controller
and register an auxiliary device for always-on reset controller
which is named as "rst-aon".

Tested-by: Tommaso Merciai &lt;tomm.merciai@gmail.com&gt;
Reviewed-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;
Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
Co-developed-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
Signed-off-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>clk: starfive: Add StarFive JH7110 system clock driver</title>
<updated>2023-04-05T14:44:12+00:00</updated>
<author>
<name>Emil Renner Berthing</name>
<email>kernel@esmil.dk</email>
</author>
<published>2023-04-01T11:19:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=edab7204afe55bdf2d17d3490eb88497ba60f628'/>
<id>urn:sha1:edab7204afe55bdf2d17d3490eb88497ba60f628</id>
<content type='text'>
Add driver for the StarFive JH7110 system clock controller and
register an auxiliary device for system reset controller which
is named as "rst-sys".

Tested-by: Tommaso Merciai &lt;tomm.merciai@gmail.com&gt;
Reviewed-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;
Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
Co-developed-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
Signed-off-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>clk: starfive: Factor out common JH7100 and JH7110 code</title>
<updated>2023-04-05T14:43:32+00:00</updated>
<author>
<name>Emil Renner Berthing</name>
<email>kernel@esmil.dk</email>
</author>
<published>2023-04-01T11:19:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=00f1cb17aeb71daf3d9ead5d11412c650329d6cf'/>
<id>urn:sha1:00f1cb17aeb71daf3d9ead5d11412c650329d6cf</id>
<content type='text'>
The clock control registers on the StarFive JH7100 and JH7110 work
identically, so factor out the code then drivers for the two SoCs
can share it without depending on each other. No functional change.

Tested-by: Tommaso Merciai &lt;tomm.merciai@gmail.com&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;
Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
Signed-off-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE</title>
<updated>2023-04-05T14:43:29+00:00</updated>
<author>
<name>Hal Feng</name>
<email>hal.feng@starfivetech.com</email>
</author>
<published>2023-04-01T11:19:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c61f19ec3be35271fc005dac34390d9c5e1a2737'/>
<id>urn:sha1:c61f19ec3be35271fc005dac34390d9c5e1a2737</id>
<content type='text'>
Using ARCH_FOO symbol is preferred than SOC_FOO.
Set obj-y for starfive/ in Makefile, so the StarFive drivers
can be compiled with COMPILE_TEST=y but ARCH_STARFIVE=n.

Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Heiko Stuebner &lt;heiko.stuebner@vrull.eu&gt;
Reviewed-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;
Signed-off-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
</feed>
