<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/clk/st, branch v6.12.80</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2023-06-09T01:39:35+00:00</updated>
<entry>
<title>clk: st: flexgen: Switch to determine_rate</title>
<updated>2023-06-09T01:39:35+00:00</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime@cerno.tech</email>
</author>
<published>2023-05-05T11:26:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=36f8a30c0f229e6b74cded8b352a9298ea545151'/>
<id>urn:sha1:36f8a30c0f229e6b74cded8b352a9298ea545151</id>
<content type='text'>
The ST Flexgen clocks implements a mux with a set_parent hook, but
doesn't provide a determine_rate implementation.

This is a bit odd, since set_parent() is there to, as its name implies,
change the parent of a clock. However, the most likely candidate to
trigger that parent change is a call to clk_set_rate(), with
determine_rate() figuring out which parent is the best suited for a
given rate.

The other trigger would be a call to clk_set_parent(), but it's far less
used, and it doesn't look like there's any obvious user for that clock.

So, the set_parent hook is effectively unused, possibly because of an
oversight. However, it could also be an explicit decision by the
original author to avoid any reparenting but through an explicit call to
clk_set_parent().

The driver does implement round_rate() though, which means that we can
change the rate of the clock, but we will never get to change the
parent.

However, It's hard to tell whether it's been done on purpose or not.

Since we'll start mandating a determine_rate() implementation, let's
convert the round_rate() implementation to a determine_rate(), which
will also make the current behavior explicit. And if it was an
oversight, the clock behaviour can be adjusted later on.

Signed-off-by: Maxime Ripard &lt;maxime@cerno.tech&gt;
Link: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v4-62-971d5077e7d2@cerno.tech
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: st: Fix memory leak in st_of_quadfs_setup()</title>
<updated>2022-12-08T02:27:11+00:00</updated>
<author>
<name>Xiu Jianfeng</name>
<email>xiujianfeng@huawei.com</email>
</author>
<published>2022-11-22T13:36:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cfd3ffb36f0d566846163118651d868e607300ba'/>
<id>urn:sha1:cfd3ffb36f0d566846163118651d868e607300ba</id>
<content type='text'>
If st_clk_register_quadfs_pll() fails, @lock should be freed before goto
@err_exit, otherwise will cause meory leak issue, fix it.

Signed-off-by: Xiu Jianfeng &lt;xiujianfeng@huawei.com&gt;
Link: https://lore.kernel.org/r/20221122133614.184910-1-xiujianfeng@huawei.com
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: st: Hold reference returned by of_get_parent()</title>
<updated>2022-08-19T21:34:44+00:00</updated>
<author>
<name>Liang He</name>
<email>windhl@126.com</email>
</author>
<published>2022-06-28T14:24:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=429973306f860470cbbb8402c8c53143b450faba'/>
<id>urn:sha1:429973306f860470cbbb8402c8c53143b450faba</id>
<content type='text'>
We should hold the reference returned by of_get_parent() and use it
to call of_node_put() for refcount balance.

Fixes: 3efe64ef5186 ("clk: st: clkgen-fsyn: search reg within node or parent")
Fixes: 810251b0d36a ("clk: st: clkgen-mux: search reg within node or parent")

Signed-off-by: Liang He &lt;windhl@126.com&gt;
Link: https://lore.kernel.org/r/20220628142416.169808-1-windhl@126.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: st: clkgen-mux: search reg within node or parent</title>
<updated>2022-01-06T01:21:28+00:00</updated>
<author>
<name>Alain Volmat</name>
<email>avolmat@me.com</email>
</author>
<published>2021-12-18T21:11:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=810251b0d36af694ece65146112a2bb541f758fb'/>
<id>urn:sha1:810251b0d36af694ece65146112a2bb541f758fb</id>
<content type='text'>
In order to avoid having duplicated addresses within the DT,
only have one unit-address per clockgen and each driver within
the clockgen should look at the parent node (overall clockgen)
to figure out the reg property.  Such behavior is already in
place in other STi platform clock drivers such as clk-flexgen
and clkgen-pll.  Keep backward compatibility by first looking
at reg within the node before looking into the parent node.

Signed-off-by: Alain Volmat &lt;avolmat@me.com&gt;
Link: https://lore.kernel.org/r/20211218211157.188214-3-avolmat@me.com
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: st: clkgen-fsyn: search reg within node or parent</title>
<updated>2022-01-06T01:21:28+00:00</updated>
<author>
<name>Alain Volmat</name>
<email>avolmat@me.com</email>
</author>
<published>2021-12-18T21:11:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3efe64ef5186c20c9ed4aeb771a7bc3225d0671b'/>
<id>urn:sha1:3efe64ef5186c20c9ed4aeb771a7bc3225d0671b</id>
<content type='text'>
In order to avoid having duplicated addresses within the DT,
only have one unit-address per clockgen and each driver within
the clockgen should look at the parent node (overall clockgen)
to figure out the reg property.  Such behavior is already in
place in other STi platform clock drivers such as clk-flexgen
and clkgen-pll.  Keep backward compatibility by first looking
at reg within the node before looking into the parent node.

Signed-off-by: Alain Volmat &lt;avolmat@me.com&gt;
Link: https://lore.kernel.org/r/20211218211157.188214-2-avolmat@me.com
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: st: clkgen-fsyn: embed soc clock outputs within compatible data</title>
<updated>2021-06-28T02:53:40+00:00</updated>
<author>
<name>Alain Volmat</name>
<email>avolmat@me.com</email>
</author>
<published>2021-03-31T20:16:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5dc1a12711b3338e3227f30c5ac15921d719d5c4'/>
<id>urn:sha1:5dc1a12711b3338e3227f30c5ac15921d719d5c4</id>
<content type='text'>
In order to avoid relying on the old style description via the DT
clock-output-names, add compatible data describing the flexgen
outputs clocks for all STiH407/STiH410 and STiH418 SOCs.

In order to ease transition between the two methods, this commit
introduce the new compatible without removing the old method.
Once DTs will be fixed, the method relying on DT clock-output-names
will be removed from this driver as well as old compatibles.

Signed-off-by: Alain Volmat &lt;avolmat@me.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Link: https://lore.kernel.org/r/20210331201632.24530-7-avolmat@me.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: st: clkgen-pll: embed soc clock outputs within compatible data</title>
<updated>2021-06-28T02:53:39+00:00</updated>
<author>
<name>Alain Volmat</name>
<email>avolmat@me.com</email>
</author>
<published>2021-03-31T20:16:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=92ef1b2beb109c23e2348de8b7ef9d0736fa0b3d'/>
<id>urn:sha1:92ef1b2beb109c23e2348de8b7ef9d0736fa0b3d</id>
<content type='text'>
In order to avoid relying on the old style description via the DT
clock-output-names, add compatible data describing the flexgen
outputs clocks for all STiH407/STiH410 and STiH418 SOCs.

In order to ease transition between the two methods, this commit
introduce the new compatible without removing the old method.
Once DTs will be fixed, the method relying on DT clock-output-names
will be removed from this driver as well as old compatibles.

Signed-off-by: Alain Volmat &lt;avolmat@me.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Link: https://lore.kernel.org/r/20210331201632.24530-5-avolmat@me.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: st: flexgen: embed soc clock outputs within compatible data</title>
<updated>2021-06-28T02:53:39+00:00</updated>
<author>
<name>Alain Volmat</name>
<email>avolmat@me.com</email>
</author>
<published>2021-03-31T20:16:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=574dffc2995cc96f1c13e802576d1fb146ebd387'/>
<id>urn:sha1:574dffc2995cc96f1c13e802576d1fb146ebd387</id>
<content type='text'>
In order to avoid relying on the old style description via the DT
clock-output-names, add compatible data describing the flexgen
outputs clocks for all STiH407/STiH410 and STiH418 SOCs.

In order to ease transition between the two methods, this commit
introduce the new compatible without removing the old method.
Once DTs will be fixed, the method relying on DT clock-output-names
will be removed from this driver as well as old compatibles.

Signed-off-by: Alain Volmat &lt;avolmat@me.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Link: https://lore.kernel.org/r/20210331201632.24530-3-avolmat@me.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: st: clkgen-pll: remove unused variable of struct clkgen_pll</title>
<updated>2021-06-28T02:53:39+00:00</updated>
<author>
<name>Alain Volmat</name>
<email>avolmat@me.com</email>
</author>
<published>2021-03-31T20:16:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b5a87e692c044c42bf9309cde4bc455bec246c60'/>
<id>urn:sha1:b5a87e692c044c42bf9309cde4bc455bec246c60</id>
<content type='text'>
ODF field within the struct clkgen_pll is never used by the driver
and can thus be removed.

Signed-off-by: Alain Volmat &lt;avolmat@me.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Link: https://lore.kernel.org/r/20210331201632.24530-2-avolmat@me.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: st: clkgen-fsyn: Fix worthy struct documentation demote partially filled one</title>
<updated>2021-02-11T19:56:06+00:00</updated>
<author>
<name>Lee Jones</name>
<email>lee.jones@linaro.org</email>
</author>
<published>2021-01-20T09:30:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4f71bdcbd6cccbaf3b6b32c163c7ef633db65bfa'/>
<id>urn:sha1:4f71bdcbd6cccbaf3b6b32c163c7ef633db65bfa</id>
<content type='text'>
Fixes the following W=1 kernel build warning(s):

 drivers/clk/st/clkgen-fsyn.c:186: warning: Function parameter or member 'data' not described in 'st_clk_quadfs_pll'
 drivers/clk/st/clkgen-fsyn.c:466: warning: Function parameter or member 'regs_base' not described in 'st_clk_quadfs_fsynth'
 drivers/clk/st/clkgen-fsyn.c:466: warning: Function parameter or member 'lock' not described in 'st_clk_quadfs_fsynth'
 drivers/clk/st/clkgen-fsyn.c:466: warning: Function parameter or member 'data' not described in 'st_clk_quadfs_fsynth'
 drivers/clk/st/clkgen-fsyn.c:466: warning: Function parameter or member 'chan' not described in 'st_clk_quadfs_fsynth'
 drivers/clk/st/clkgen-fsyn.c:466: warning: Function parameter or member 'md' not described in 'st_clk_quadfs_fsynth'
 drivers/clk/st/clkgen-fsyn.c:466: warning: Function parameter or member 'pe' not described in 'st_clk_quadfs_fsynth'
 drivers/clk/st/clkgen-fsyn.c:466: warning: Function parameter or member 'sdiv' not described in 'st_clk_quadfs_fsynth'

Cc: Michael Turquette &lt;mturquette@baylibre.com&gt;
Cc: Stephen Boyd &lt;sboyd@kernel.org&gt;
Cc: Kees Cook &lt;keescook@chromium.org&gt;
Cc: Stephen Gallimore &lt;stephen.gallimore@st.com&gt;
Cc: Pankaj Dev &lt;pankaj.dev@st.com&gt;
Cc: linux-clk@vger.kernel.org
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Link: https://lore.kernel.org/r/20210120093040.1719407-13-lee.jones@linaro.org
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
</feed>
