<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/clk/sprd, branch v4.19.77</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.19.77</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.19.77'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2019-08-25T08:47:52+00:00</updated>
<entry>
<title>clk: sprd: Select REGMAP_MMIO to avoid compile errors</title>
<updated>2019-08-25T08:47:52+00:00</updated>
<author>
<name>Chunyan Zhang</name>
<email>chunyan.zhang@unisoc.com</email>
</author>
<published>2019-07-18T05:36:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=af2ed1a05a7a398a784589b125b7df587f5a6e79'/>
<id>urn:sha1:af2ed1a05a7a398a784589b125b7df587f5a6e79</id>
<content type='text'>
[ Upstream commit c9a67cbb5189e966c70451562b2ca4c3876ab546 ]

Make REGMAP_MMIO selected to avoid undefined reference to regmap symbols.

Fixes: d41f59fd92f2 ("clk: sprd: Add common infrastructure")
Signed-off-by: Chunyan Zhang &lt;chunyan.zhang@unisoc.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: sprd: Add check for return value of sprd_clk_regmap_init()</title>
<updated>2019-08-06T17:06:49+00:00</updated>
<author>
<name>Chunyan Zhang</name>
<email>zhang.chunyan@linaro.org</email>
</author>
<published>2019-05-22T01:15:03+00:00</published>
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<id>urn:sha1:e7fcc587e0763c5061f0a5220f8dfa41f71e64bc</id>
<content type='text'>
[ Upstream commit c974c48deeb969c5e4250e4f06af91edd84b1f10 ]

sprd_clk_regmap_init() doesn't always return success, adding check
for its return value should make the code more strong.

Signed-off-by: Chunyan Zhang &lt;zhang.chunyan@linaro.org&gt;
Reviewed-by: Baolin Wang &lt;baolin.wang@linaro.org&gt;
[sboyd@kernel.org: Add a missing int ret]
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: sprd: add RTC gate for SC9860</title>
<updated>2018-03-16T22:53:30+00:00</updated>
<author>
<name>Chunyan Zhang</name>
<email>chunyan.zhang@spreadtrum.com</email>
</author>
<published>2018-02-09T09:55:09+00:00</published>
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<id>urn:sha1:b3316a672bfbedbe0437b21937c1d6aeacbaabe4</id>
<content type='text'>
Add a few gate clocks which are used for gating RTC for some
devices on AON area of SC9860.

This patch has been tested on SC9860, with this patch and proper DT
configurations, the watchdog can be initialized and work well.

Signed-off-by: Chunyan Zhang &lt;chunyan.zhang@spreadtrum.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'clk-divider-container' into clk-next</title>
<updated>2018-01-27T00:43:14+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2018-01-27T00:42:03+00:00</published>
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<id>urn:sha1:716d9b1d4a88493ec3e52957cc1026d32534ee67</id>
<content type='text'>
* clk-divider-container:
  clk: divider: fix incorrect usage of container_of

Plus fixup sprd/div.c to pass the width too.
</content>
</entry>
<entry>
<title>clk: sprd: add clocks support for SC9860</title>
<updated>2017-12-21T23:00:54+00:00</updated>
<author>
<name>Chunyan Zhang</name>
<email>chunyan.zhang@spreadtrum.com</email>
</author>
<published>2017-12-07T12:57:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a6ae1a2948d4bccf49ff64a3f907514ce7d81bac'/>
<id>urn:sha1:a6ae1a2948d4bccf49ff64a3f907514ce7d81bac</id>
<content type='text'>
This patch added the list of clocks for Spreadtrum's SC9860 SoC,
together with clock initialization code.

Signed-off-by: Chunyan Zhang &lt;chunyan.zhang@spreadtrum.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: sprd: add adjustable pll support</title>
<updated>2017-12-21T23:00:53+00:00</updated>
<author>
<name>Chunyan Zhang</name>
<email>chunyan.zhang@spreadtrum.com</email>
</author>
<published>2017-12-07T12:57:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3e37b005580b9db89d7f335e121d52d3bd58e234'/>
<id>urn:sha1:3e37b005580b9db89d7f335e121d52d3bd58e234</id>
<content type='text'>
Introduced a common adjustable pll clock driver for Spreadtrum SoCs.

Signed-off-by: Chunyan Zhang &lt;chunyan.zhang@spreadtrum.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: sprd: add composite clock support</title>
<updated>2017-12-21T23:00:52+00:00</updated>
<author>
<name>Chunyan Zhang</name>
<email>chunyan.zhang@spreadtrum.com</email>
</author>
<published>2017-12-07T12:57:09+00:00</published>
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<id>urn:sha1:4fcba55cc621795caee6ba3503dbe70d10e268b2</id>
<content type='text'>
This patch introduced composite driver for Spreadtrum's SoCs. The
functions of this composite clock simply consist of divider and
mux clocks.

Signed-off-by: Chunyan Zhang &lt;chunyan.zhang@spreadtrum.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: sprd: add divider clock support</title>
<updated>2017-12-21T23:00:52+00:00</updated>
<author>
<name>Chunyan Zhang</name>
<email>chunyan.zhang@spreadtrum.com</email>
</author>
<published>2017-12-07T12:57:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e3f05d3b18e6cfbddaed687b4a57c280015acc1f'/>
<id>urn:sha1:e3f05d3b18e6cfbddaed687b4a57c280015acc1f</id>
<content type='text'>
This is a feature that can also be found in sprd composite clocks,
provide a bunch of helpers that can be reused later on.

Signed-off-by: Chunyan Zhang &lt;chunyan.zhang@spreadtrum.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: sprd: add mux clock support</title>
<updated>2017-12-21T23:00:52+00:00</updated>
<author>
<name>Chunyan Zhang</name>
<email>chunyan.zhang@spreadtrum.com</email>
</author>
<published>2017-12-07T12:57:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ab73cf2a54595f9b52cf1d0172be46eb945b5346'/>
<id>urn:sha1:ab73cf2a54595f9b52cf1d0172be46eb945b5346</id>
<content type='text'>
This patch adds clock multiplexor support for Spreadtrum platforms,
the mux clocks also can be found in sprd composite clocks, so
provides two helpers that can be reused later on.

Signed-off-by: Chunyan Zhang &lt;chunyan.zhang@spreadtrum.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: sprd: add gate clock support</title>
<updated>2017-12-21T23:00:51+00:00</updated>
<author>
<name>Chunyan Zhang</name>
<email>chunyan.zhang@spreadtrum.com</email>
</author>
<published>2017-12-07T12:57:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cdb09f67a2b58f0e0a2764243cf2c912c158f0a6'/>
<id>urn:sha1:cdb09f67a2b58f0e0a2764243cf2c912c158f0a6</id>
<content type='text'>
Some clocks on the Spreadtrum's SoCs are just simple gates. Add
support for those clocks.

Signed-off-by: Chunyan Zhang &lt;chunyan.zhang@spreadtrum.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
</feed>
