kernel/linux.git/drivers/clk/sprd, branch linux-4.20.yLinux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=linux-4.20.y2018-03-16T22:53:30+00:00clk: sprd: add RTC gate for SC98602018-03-16T22:53:30+00:00Chunyan Zhangchunyan.zhang@spreadtrum.com2018-02-09T09:55:09+00:00urn:sha1:b3316a672bfbedbe0437b21937c1d6aeacbaabe4
Add a few gate clocks which are used for gating RTC for some
devices on AON area of SC9860.
This patch has been tested on SC9860, with this patch and proper DT
configurations, the watchdog can be initialized and work well.
Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Merge branch 'clk-divider-container' into clk-next2018-01-27T00:43:14+00:00Stephen Boydsboyd@codeaurora.org2018-01-27T00:42:03+00:00urn:sha1:716d9b1d4a88493ec3e52957cc1026d32534ee67
* clk-divider-container:
clk: divider: fix incorrect usage of container_of
Plus fixup sprd/div.c to pass the width too.
clk: sprd: add clocks support for SC98602017-12-21T23:00:54+00:00Chunyan Zhangchunyan.zhang@spreadtrum.com2017-12-07T12:57:13+00:00urn:sha1:a6ae1a2948d4bccf49ff64a3f907514ce7d81bac
This patch added the list of clocks for Spreadtrum's SC9860 SoC,
together with clock initialization code.
Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk: sprd: add adjustable pll support2017-12-21T23:00:53+00:00Chunyan Zhangchunyan.zhang@spreadtrum.com2017-12-07T12:57:10+00:00urn:sha1:3e37b005580b9db89d7f335e121d52d3bd58e234
Introduced a common adjustable pll clock driver for Spreadtrum SoCs.
Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk: sprd: add composite clock support2017-12-21T23:00:52+00:00Chunyan Zhangchunyan.zhang@spreadtrum.com2017-12-07T12:57:09+00:00urn:sha1:4fcba55cc621795caee6ba3503dbe70d10e268b2
This patch introduced composite driver for Spreadtrum's SoCs. The
functions of this composite clock simply consist of divider and
mux clocks.
Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk: sprd: add divider clock support2017-12-21T23:00:52+00:00Chunyan Zhangchunyan.zhang@spreadtrum.com2017-12-07T12:57:08+00:00urn:sha1:e3f05d3b18e6cfbddaed687b4a57c280015acc1f
This is a feature that can also be found in sprd composite clocks,
provide a bunch of helpers that can be reused later on.
Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk: sprd: add mux clock support2017-12-21T23:00:52+00:00Chunyan Zhangchunyan.zhang@spreadtrum.com2017-12-07T12:57:07+00:00urn:sha1:ab73cf2a54595f9b52cf1d0172be46eb945b5346
This patch adds clock multiplexor support for Spreadtrum platforms,
the mux clocks also can be found in sprd composite clocks, so
provides two helpers that can be reused later on.
Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk: sprd: add gate clock support2017-12-21T23:00:51+00:00Chunyan Zhangchunyan.zhang@spreadtrum.com2017-12-07T12:57:06+00:00urn:sha1:cdb09f67a2b58f0e0a2764243cf2c912c158f0a6
Some clocks on the Spreadtrum's SoCs are just simple gates. Add
support for those clocks.
Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk: sprd: Add common infrastructure2017-12-21T23:00:51+00:00Chunyan Zhangchunyan.zhang@spreadtrum.com2017-12-07T12:57:05+00:00urn:sha1:d41f59fd92f2ef73026f55cd356a4ca253f4716a
Added Spreadtrum's clock driver framework together with common
structures and interface functions.
Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>