kernel/linux.git/drivers/clk/mediatek, branch v4.8.16

clk: mediatek: remove hdmitx_dig_cts from TOP clocks

2016-05-06T15:47:42+00:00

The hdmitx_dig_cts clock signal is not a child of tvdpll_445p5m, but is routed out of the HDMI PHY module. Signed-off-by: Philipp Zabel Acked-by: Stephen Boyd

clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output

2016-05-06T15:47:40+00:00

The configurable hdmi_ref output of the PLL block is derived from the tvdpll_594m clock signal via a configurable PLL post-divider. It is used as the PLL reference input to the HDMI PHY module. Signed-off-by: Philipp Zabel Acked-by: James Liao Acked-by: Stephen Boyd

clk: mediatek: make dpi0_sel propagate rate changes

2016-05-06T15:47:39+00:00

This mux is supposed to select a fitting divider after the PLL is already set to the correct rate. Signed-off-by: Philipp Zabel Acked-by: James Liao Acked-by: Stephen Boyd

clk: mediatek: Make reset_control_ops const

2016-03-29T23:29:19+00:00

The mtk_reset_ops structure is never modified. Make it const. Signed-off-by: Philipp Zabel Reviewed-by: Matthias Brugger Signed-off-by: Stephen Boyd

clk: mediatek: Remove CLK_IS_ROOT

2016-03-03T01:44:06+00:00

This flag is a no-op now. Remove usage of the flag. Acked-by: James Liao Signed-off-by: Stephen Boyd

clk: mediatek: Fix memory leak on clock init fail

2016-01-29T21:02:51+00:00

mtk_clk_register_composite() may leak memory due to some error handling path don't free all allocated memory. This patch free all pointers that may allocate memory before error return. And it's safe because kfree() can handle NULL pointers. Signed-off-by: James Liao Reviewed-by: Daniel Kurtz Signed-off-by: Stephen Boyd

clk: move the common clock's to_clk_*(_hw) macros to clk-provider.h

2016-01-29T20:59:50+00:00

to_clk_*(_hw) macros have been repeatedly defined in many places. This patch moves all the to_clk_*(_hw) definitions in the common clock framework to public header clk-provider.h, and drop the local definitions. Signed-off-by: Geliang Tang Signed-off-by: Stephen Boyd

clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS

2015-10-01T04:06:00+00:00

Add REF2USB_TX clock support into MT8173 APMIXEDSYS. This clock is needed by USB 3.0. Signed-off-by: James Liao Reviewed-by: Daniel Kurtz

clk: mediatek: Add subsystem clocks of MT8173

2015-10-01T04:04:50+00:00

Most multimedia subsystem clocks will be accessed by multiple drivers, so it's a better way to manage these clocks in CCF. This patch adds clock support for MM, IMG, VDEC, VENC and VENC_LT subsystems. Signed-off-by: James Liao Reviewed-by: Daniel Kurtz

clk: mediatek: Fix rate and dependency of MT8173 clocks

2015-10-01T04:04:50+00:00

Remove the dependency from clk_null, and give all root clocks a typical rate, include clkph_mck_o, usb_syspll_125m and hdmitx_dig_cts. dpi_ck was removed due to no clock reference to it. Replace parent clock of infra_cpum with cpum_ck, which is an external clock and can be defined in the device tree. Signed-off-by: James Liao Reviewed-by: Daniel Kurtz