kernel/linux.git/drivers/clk/mediatek/Makefile, branch v6.2

clk: mediatek: Add new clock driver to handle FHCTL hardware

2022-11-29T06:43:07+00:00

To implement frequency hopping and spread spectrum clocking function, we introduce new clock type and APIs to handle FHCTL hardware. Co-developed-by: Edward-JW Yang Signed-off-by: Edward-JW Yang Signed-off-by: Johnson Wang Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20221121122957.21611-4-johnson.wang@mediatek.com Signed-off-by: Chen-Yu Tsai

clk: mediatek: add driver for MT8365 SoC

2022-09-30T22:08:16+00:00

Add clock drivers for MT8365 SoC. Signed-off-by: Fabien Parent Signed-off-by: Markus Schneider-Pargmann Link: https://lore.kernel.org/r/20220822152652.3499972-5-msp@baylibre.com Reported-by: kernel test robot Signed-off-by: Stephen Boyd

clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers

2022-09-26T03:13:09+00:00

Add the clock drivers for the entire clock tree of MediaTek Helio X10 MT6795, including system clocks (apmixedsys, infracfg, pericfg, topckgen) and multimedia clocks (mmsys, mfg, vdecsys, vencsys). Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger Reviewed-by: Miles Chen Link: https://lore.kernel.org/r/20220921091455.41327-9-angelogioacchino.delregno@collabora.com Signed-off-by: Chen-Yu Tsai

clk: mediatek: Add MT8186 ipesys clock support

2022-04-25T23:59:41+00:00

Add MT8186 ipesys clock controller which provides clock gate control for Image Process Engine. Signed-off-by: Chun-Jie Chen Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Miles Chen Link: https://lore.kernel.org/r/20220409132251.31725-16-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8186 mdpsys clock support

2022-04-25T23:59:40+00:00

Add MT8186 mdpsys clock controller which provides clock gate control in Multimedia Data Path. Signed-off-by: Chun-Jie Chen Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Miles Chen Link: https://lore.kernel.org/r/20220409132251.31725-15-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8186 camsys clock support

2022-04-25T23:59:40+00:00

Add MT8186 camsys clock controllers which provide clock gate control for camera IP blocks. Signed-off-by: Chun-Jie Chen Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Miles Chen Link: https://lore.kernel.org/r/20220409132251.31725-14-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8186 vencsys clock support

2022-04-25T23:59:40+00:00

Add MT8186 vencsys clock controller which provide clock gate control for video encoder. Signed-off-by: Chun-Jie Chen Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Miles Chen Link: https://lore.kernel.org/r/20220409132251.31725-13-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8186 vdecsys clock support

2022-04-25T23:59:40+00:00

Add MT8186 vdec clock controller which provide clock gate control for video decoder. Signed-off-by: Chun-Jie Chen Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Miles Chen Link: https://lore.kernel.org/r/20220409132251.31725-12-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8186 imgsys clock support

2022-04-25T23:59:40+00:00

Add MT8186 imgsys clock controllers which provide clock gate control for image IP blocks. Signed-off-by: Chun-Jie Chen Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Miles Chen Link: https://lore.kernel.org/r/20220409132251.31725-11-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8186 wpesys clock support

2022-04-25T23:59:40+00:00

Add MT8186 wpesys clock controllers which provide clock gate control in Wrapping Engine. Signed-off-by: Chun-Jie Chen Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Miles Chen Link: https://lore.kernel.org/r/20220409132251.31725-10-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd