<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/char/hw_random/Makefile, branch v6.19.11</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.11</id>
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<updated>2024-11-10T03:51:26+00:00</updated>
<entry>
<title>hwrng: bcm74110 - Add Broadcom BCM74110 RNG driver</title>
<updated>2024-11-10T03:51:26+00:00</updated>
<author>
<name>Markus Mayer</name>
<email>mmayer@broadcom.com</email>
</author>
<published>2024-11-01T21:13:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=35b2237f27c33c9d84733e03d84d79b6a6062715'/>
<id>urn:sha1:35b2237f27c33c9d84733e03d84d79b6a6062715</id>
<content type='text'>
Add a driver for the random number generator present on the Broadcom
BCM74110 SoC.

Signed-off-by: Markus Mayer &lt;mmayer@broadcom.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>hwrng: airoha - add support for Airoha EN7581 TRNG</title>
<updated>2024-10-28T10:33:10+00:00</updated>
<author>
<name>Christian Marangi</name>
<email>ansuelsmth@gmail.com</email>
</author>
<published>2024-10-17T12:44:38+00:00</published>
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<id>urn:sha1:e53ca8efcc5ec1a19b699f40f506ce076e27c769</id>
<content type='text'>
Add support for Airoha TRNG. The Airoha SoC provide a True RNG module
that can output 4 bytes of raw data at times.

The module makes use of various noise source to provide True Random
Number Generation.

On probe the module is reset to operate Health Test and verify correct
execution of it.

The module can also provide DRBG function but the execution mode is
mutually exclusive, running as TRNG doesn't permit to also run it as
DRBG.

Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
Reviewed-by: Martin Kaiser &lt;martin@kaiser.cx&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>hwrng: rockchip - add hwrng driver for Rockchip RK3568 SoC</title>
<updated>2024-08-10T04:25:34+00:00</updated>
<author>
<name>Aurelien Jarno</name>
<email>aurelien@aurel32.net</email>
</author>
<published>2024-07-30T16:11:04+00:00</published>
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<id>urn:sha1:dcf4fef6631c302f9bdd188979fe3172e47a29c7</id>
<content type='text'>
Rockchip SoCs used to have a random number generator as part of their
crypto device, and support for it has to be added to the corresponding
driver. However newer Rockchip SoCs like the RK3568 have an independent
True Random Number Generator device. This patch adds a driver for it,
greatly inspired from the downstream driver.

The TRNG device does not seem to have a signal conditionner and the FIPS
140-2 test returns a lot of failures. They can be reduced by increasing
RK_RNG_SAMPLE_CNT, in a tradeoff between quality and speed. This value
has been adjusted to get ~90% of successes and the quality value has
been set accordingly.

Signed-off-by: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
[daniel@makrotpia.org: code style fixes]
Signed-off-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>hwrng: histb - Move driver to drivers/char/hw_random/histb-rng.c</title>
<updated>2023-05-12T10:48:01+00:00</updated>
<author>
<name>David Yang</name>
<email>mmyangfl@gmail.com</email>
</author>
<published>2023-04-21T16:56:49+00:00</published>
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<id>urn:sha1:903e6ada01f305eb6c82a27f48bf1ea18eb38a99</id>
<content type='text'>
Move to drivers/char/hw_random since histb-(t)rng does not provide
cryptography pseudo rng.

histb-rng is pretty like hisi-rng, but after investigation, we confirm
there is no RNG_PHY_SEED register on histb-rng so a separate driver is
needed.

Still we rename relevant function names to match those in hisi-rng.

Link: https://lore.kernel.org/r/20230401164448.1393336-1-mmyangfl@gmail.com
Signed-off-by: David Yang &lt;mmyangfl@gmail.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>hwrng: starfive - Add TRNG driver for StarFive SoC</title>
<updated>2023-01-27T10:58:09+00:00</updated>
<author>
<name>Jia Jie Ho</name>
<email>jiajie.ho@starfivetech.com</email>
</author>
<published>2023-01-17T01:54:44+00:00</published>
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<id>urn:sha1:c388f458bc34eb3a5728b67f6614f9375cd99087</id>
<content type='text'>
This adds driver support for the hardware random number generator in
Starfive SoCs and adds StarFive TRNG entry to MAINTAINERS.

Co-developed-by: Jenny Zhang &lt;jenny.zhang@starfivetech.com&gt;
Signed-off-by: Jenny Zhang &lt;jenny.zhang@starfivetech.com&gt;
Signed-off-by: Jia Jie Ho &lt;jiajie.ho@starfivetech.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>hwrng: mpfs - add polarfire soc hwrng support</title>
<updated>2022-04-15T08:34:28+00:00</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2022-04-08T10:09:12+00:00</published>
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<id>urn:sha1:716a757c83ad6208a743dd8fb1577055d0867ee8</id>
<content type='text'>
Add a driver to access the hardware random number generator on the
Polarfire SoC. The hwrng can only be accessed via the system controller,
so use the mailbox interface the system controller exposes to access the
hwrng.

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>Merge tag 'mips_5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux</title>
<updated>2022-01-14T14:08:36+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-01-14T14:08:36+00:00</published>
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<id>urn:sha1:3fb561b1e0bf4c75bc5f4d799845b08fa5ab3853</id>
<content type='text'>
Pull MIPS updates from Thomas Bogendoerfer:

 - add support for more BCM47XX based devices

 - add MIPS support for brcmstb PCIe controller

 - add Loongson 2K1000 reset driver

 - remove board support for rbtx4938/rbtx4939

 - remove support for TX4939 SoCs

 - fixes and cleanups

* tag 'mips_5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (59 commits)
  MIPS: ath79: drop _machine_restart again
  PCI: brcmstb: Augment driver for MIPs SOCs
  MIPS: bmips: Remove obsolete DMA mapping support
  MIPS: bmips: Add support PCIe controller device nodes
  dt-bindings: PCI: Add compatible string for Brcmstb 74[23]5 MIPs SOCs
  MIPS: compressed: Fix build with ZSTD compression
  MIPS: BCM47XX: Add support for Netgear WN2500RP v1 &amp; v2
  MIPS: BCM47XX: Add support for Netgear R6300 v1
  MIPS: BCM47XX: Add LEDs and buttons for Asus RTN-10U
  MIPS: BCM47XX: Add board entry for Linksys WRT320N v1
  MIPS: BCM47XX: Define Linksys WRT310N V2 buttons
  MIPS: Remove duplicated include in local.h
  MIPS: retire "asm/llsc.h"
  MIPS: rework local_t operation on MIPS64
  MIPS: fix local_{add,sub}_return on MIPS64
  mips/pci: remove redundant ret variable
  MIPS: Loongson64: Add missing of_node_put() in ls2k_reset_init()
  MIPS: new Kconfig option ZBOOT_LOAD_ADDRESS
  MIPS: enable both vmlinux.gz.itb and vmlinuz for generic
  MIPS: signal: Return immediately if call fails
  ...
</content>
</entry>
<entry>
<title>MIPS: TXX9: Remove TX4939 SoC support</title>
<updated>2022-01-02T13:12:03+00:00</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2021-11-30T16:45:56+00:00</published>
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<id>urn:sha1:fc5bb239d5b3500d034559e0c5ecb67bbae69de7</id>
<content type='text'>
After removal of RBTX4939 board support remove code for the TX4939 SoC.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Tested-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
</content>
</entry>
<entry>
<title>hwrng: cn10k - Add random number generator support</title>
<updated>2021-12-24T03:18:22+00:00</updated>
<author>
<name>Sunil Goutham</name>
<email>sgoutham@marvell.com</email>
</author>
<published>2021-12-14T10:51:08+00:00</published>
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<id>urn:sha1:38e9791a02090414d1e3433549001689cad71098</id>
<content type='text'>
CN10K series of silicons support true random number
generators. This patch adds support for the same. Also
supports entropy health status checking.

Signed-off-by: Sunil Goutham &lt;sgoutham@marvell.com&gt;
Signed-off-by: Bharat Bhushan &lt;bbhushan2@marvell.com&gt;
Signed-off-by: Joseph Longever &lt;jlongever@marvell.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>hwrng: Add Arm SMCCC TRNG based driver</title>
<updated>2021-08-06T11:45:26+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2021-07-31T20:48:45+00:00</published>
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<id>urn:sha1:0888d04b47a165ae8c429c6fe11b3c43f5017f31</id>
<content type='text'>
The "Arm True Random Number Generator Firmware Interface"[1] provides
an SMCCC based interface to a true hardware random number generator.
So far we are using that in arch_get_random_seed(), but it might be
useful to expose the entropy through the /dev/hwrng device as well. This
allows to assess the quality of the implementation, by using "rngtest"
from the rng-tools package, for example.

Add a simple platform driver implementing the hw_random interface.
The corresponding platform device is created by the SMCCC core code,
we just match it here by name and provide a module alias.

Since the firmware takes care about serialisation, this can happily
coexist with the arch_get_random_seed() bits.

[1] https://developer.arm.com/documentation/den0098/latest/

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Ard Biesheuvel &lt;ardb@kernel.org&gt;
Reviewed-by: Mark Brown &lt;broonie@kernel.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
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