<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/cache/starfive_starlink_cache.c, branch v6.18.21</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.18.21</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.18.21'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2026-03-25T10:10:38+00:00</updated>
<entry>
<title>cache: starfive: fix device node leak in starlink_cache_init()</title>
<updated>2026-03-25T10:10:38+00:00</updated>
<author>
<name>Felix Gu</name>
<email>ustc.gu@gmail.com</email>
</author>
<published>2026-01-30T17:13:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=606fcf901c132ed87286d8b3d06a0fff36256c84'/>
<id>urn:sha1:606fcf901c132ed87286d8b3d06a0fff36256c84</id>
<content type='text'>
[ Upstream commit 3c85234b979af71cb9db5eb976ea08a468415767 ]

of_find_matching_node() returns a device_node with refcount incremented.

Use __free(device_node) attribute to automatically call of_node_put()
when the variable goes out of scope, preventing the refcount leak.

Fixes: cabff60ca77d ("cache: Add StarFive StarLink cache management")
Signed-off-by: Felix Gu &lt;ustc.gu@gmail.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>cache: Add StarFive StarLink cache management</title>
<updated>2024-05-28T11:34:11+00:00</updated>
<author>
<name>Joshua Yeong</name>
<email>joshua.yeong@starfivetech.com</email>
</author>
<published>2024-05-15T05:02:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cabff60ca77da6cb460988e2af40bde95776d92b'/>
<id>urn:sha1:cabff60ca77da6cb460988e2af40bde95776d92b</id>
<content type='text'>
Add StarFive Starlink cache management driver.
The driver enables RISC-V non-standard cache
operation on SoC that does not support Zicbom
extension instructions.

Signed-off-by: Joshua Yeong &lt;joshua.yeong@starfivetech.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
</feed>
