kernel/linux.git/drivers/bcma/driver_mips.c, branch v4.17.1

bcma: fix buffer size caused crash in bcma_core_mips_print_irq()

2018-05-12T08:36:59+00:00

Used buffer wasn't big enough to hold whole strings. Example output of this function is: [ 0.180892] bcma: bus0: core 0x0800, irq: 2(S)* 3 4 5 6 D I [ 0.180948] bcma: bus0: core 0x0812, irq: 2(S) 3* 4 5 6 D I [ 0.180998] bcma: bus0: core 0x082d, irq: 2(S) 3 4* 5 6 D I [ 0.181046] bcma: bus0: core 0x082c, irq: 2(S) 3 4 5 6 D I* which means we need to store up to 24 chars. Fixes: 758f7e06063a8 ("bcma: Use bcma_debug and not pr_cont in MIPS driver") Signed-off-by: Rafał Miłecki Cc: stable@vger.kernel.org # v4.15+ Signed-off-by: Kalle Valo

bcma: Use bcma_debug and not pr_cont in MIPS driver

2017-10-27T08:01:37+00:00

Commit 66cc04424960 ("bcma: use bcma_debug and pr_cont in MIPS driver") converted a printk(KERN_DEBUG to bcma_debug. bcma_debug is guarded by a #define DEBUG via pr_debug. This means that the bcma_debug will generally not be emitted but any pr_cont following the bcma_debug will be emitted. Correct this by removing the uses of pr_cont by using a temporary. Signed-off-by: Joe Perches Signed-off-by: Kalle Valo

bcma: use bcma_debug and pr_cont in MIPS driver

2017-10-17T14:22:07+00:00

Using bcma_debug gives a device-specific prefix for messages and pr_cont is a common helper for continuing a line. Signed-off-by: Rafał Miłecki Acked-By: Hauke Mehrtens Signed-off-by: Kalle Valo

Revert "bcma: init serial console directly from ChipCommon code"

2017-01-17T12:23:44+00:00

This reverts commit 4c81acab3816 ("bcma: init serial console directly from ChipCommon code") as it broke IRQ assignment. Getting IRQ with bcma_core_irq helper on SoC requires MIPS core to be set. It happens *after* ChipCommon initialization so we can't do this so early. This fixes a user reported regression. It wasn't critical as serial was still somehow working but lack of IRQs was making in unreliable. Fixes: 4c81acab3816 ("bcma: init serial console directly from ChipCommon code") Reported-by: Felix Fietkau Cc: stable@vger.kernel.org # 4.6+ Signed-off-by: Rafał Miłecki Signed-off-by: Kalle Valo

bcma: move flash detection code to ChipCommon core driver

2016-03-07T12:41:08+00:00

Flashes are attached and accessible through ChipCommon core, they aren't connected to MIPS one. Moreover some new ARM devices (e.g. BCM47189) may have serial flash accessibility using ChipCommon registers as well. To support them we can't keep this code in MIPS core driver. Signed-off-by: Rafał Miłecki Signed-off-by: Kalle Valo

bcma: move parallel flash support to separated file

2016-03-07T12:41:08+00:00

This follows the way of handling other flashes and cleans code a bit. As next task we will want to move flash code to ChipCommon driver as: 1) Flash controllers are accesible using ChipCommon registers 2) This code isn't MIPS specific This change prepares bcma for that. Signed-off-by: Rafał Miłecki Signed-off-by: Kalle Valo

bcma: drop unneeded fields from bcma_pflash struct

2016-03-07T12:41:08+00:00

Most of info stored in this struct wasn't really used anywhere as we put all that data in platform data & resource as well. Signed-off-by: Rafał Miłecki Signed-off-by: Kalle Valo

bcma: init serial console directly from ChipCommon code

2016-02-06T11:45:04+00:00

UART is connected to and controlled over ChipCommon core. It doesn't have much to do with MIPS core (where we initialize it currently) except just existing on embedded systemms. There isn't point of such cross-core initialization (and we needed #ifdef anyway) so just handle it in ChipCommon. Signed-off-by: Rafał Miłecki Signed-off-by: Kalle Valo

MIPS: BCM47xx: Move NVRAM header to the include/linux/.

2015-04-01T15:22:00+00:00

There are two reasons for having this header in the common place: 1) Simplifying drivers that read NVRAM entries. We will be able to safely call bcm47xx_nvram_* functions without #ifdef-s. 2) Getting NVRAM driver out of MIPS arch code. This is needed to support BCM5301X arch which also requires this NVRAM driver. Patch for that will follow once we get is reviewed. Signed-off-by: Rafał Miłecki Acked-by: Hauke Mehrtens Cc: linux-mips@linux-mips.org Cc: Arnd Bergmann Cc: Paul Walmsley Cc: linux-soc@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8619/ Signed-off-by: Ralf Baechle

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

2014-12-12T01:56:37+00:00

Pull MIPS updates from Ralf Baechle: "This is an unusually large pull request for MIPS - in parts because lots of patches missed the 3.18 deadline but primarily because some folks opened the flood gates. - Retire the MIPS-specific phys_t with the generic phys_addr_t. - Improvments for the backtrace code used by oprofile. - Better backtraces on SMP systems. - Cleanups for the Octeon platform code. - Cleanups and fixes for the Loongson platform code. - Cleanups and fixes to the firmware library. - Switch ATH79 platform to use the firmware library. - Grand overhault to the SEAD3 and Malta interrupt code. - Move the GIC interrupt code to drivers/irqchip - Lots of GIC cleanups and updates to the GIC code to use modern IRQ infrastructures and features of the kernel. - OF documentation updates for the GIC bindings - Move GIC clocksource driver to drivers/clocksource - Merge GIC clocksource driver with clockevent driver. - Further updates to bring the GIC clocksource driver up to date. - R3000 TLB code cleanups - Improvments to the Loongson 3 platform code. - Convert pr_warning to pr_warn. - Merge a bunch of small lantiq and ralink fixes that have been staged/lingering inside the openwrt tree for a while. - Update archhelp for IP22/IP32 - Fix a number of issues for Loongson 1B. - New clocksource and clockevent driver for Loongson 1B. - Further work on clk handling for Loongson 1B. - Platform work for Broadcom BMIPS. - Error handling cleanups for TurboChannel. - Fixes and optimization to the microMIPS support. - Option to disable the FTLB. - Dump more relevant information on machine check exception - Change binfmt to allow arch to examine PT_*PROC headers - Support for new style FPU register model in O32 - VDSO randomization. - BCM47xx cleanups - BCM47xx reimplement the way the kernel accesses NVRAM information. - Random cleanups - Add support for ATH25 platforms - Remove pointless locking code in some PCI platforms. - Some improvments to EVA support - Minor Alchemy cleanup" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (185 commits) MIPS: Add MFHC0 and MTHC0 instructions to uasm. MIPS: Cosmetic cleanups of page table headers. MIPS: Add CP0 macros for extended EntryLo registers MIPS: Remove now unused definition of phys_t. MIPS: Replace use of phys_t with phys_addr_t. MIPS: Replace MIPS-specific 64BIT_PHYS_ADDR with generic PHYS_ADDR_T_64BIT PCMCIA: Alchemy Don't select 64BIT_PHYS_ADDR in Kconfig. MIPS: lib: memset: Clean up some MIPS{EL,EB} ifdefery MIPS: iomap: Use __mem_{read,write}{b,w,l} for MMIO MIPS: fix indentation. MAINTAINERS: Add entry for BMIPS multiplatform kernel MIPS: Enable VDSO randomization MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration MIPS: Remove declaration of obsolete arch_init_clk_ops() MIPS: atomic.h: Reformat to fit in 79 columns MIPS: Apply `.insn' to fixup labels throughout MIPS: Fix microMIPS LL/SC immediate offsets MIPS: Kconfig: Only allow 32-bit microMIPS builds MIPS: signal.c: Fix an invalid cast in ISA mode bit handling MIPS: mm: Only build one microassembler that is suitable ...