kernel/linux.git/drivers/ata, branch linux-2.6.22.y

sata_promise: ASIC PRD table bug workaround

2008-02-25T23:59:17+00:00

patch b9ccd4a90bbb964506f01b4bdcff4f50f8d5d334 in mainline. Second-generation Promise SATA controllers have an ASIC bug which can trigger if the last PRD entry is larger than 164 bytes, resulting in intermittent errors and possible data corruption. Work around this by replacing calls to ata_qc_prep() with a private version that fills the PRD, checks the size of the last entry, and if necessary splits it to avoid the bug. Also reduce sg_tablesize by 1 to accommodate the new entry. Tested on the second-generation SATA300 TX4 and SATA300 TX2plus, and the first-generation PDC20378. Thanks to Alexander Sabourenkov for verifying the bug by studying the vendor driver, and for writing the initial patch upon which this one is based. Signed-off-by: Mikael Pettersson Cc: Jeff Garzik Signed-off-by: Greg Kroah-Hartman

sata_promise: FastTrack TX4200 is a second-generation chip

2008-02-25T23:59:17+00:00

patch 7f9992a23190418592f0810900e4f91546ec41da in mainline. This patch corrects sata_promise to classify FastTrack TX4200 (DID 3515/3519) as a second-generation chip. Promise's partial- source FT TX4200 driver confirms this classification. Treating it as a first-generation chip causes several problems: 1. Detection failures. This is a recent regression triggered by the hotplug-enabling changes in 2.6.23-rc1. 2. Various "failed to resume link for reset" warnings. This patch fixes . Thanks to Stephen Ziemba for reporting the bug and for testing the fix. Signed-off-by: Mikael Pettersson Signed-off-by: Greg Kroah-Hartman

libata: kill spurious NCQ completion detection

2007-12-14T18:32:01+00:00

patch 459ad68893a84fb0881e57919340b97edbbc3dc7 in mainline. Spurious NCQ completion detection implemented in ahci was incorrect. On AHCI receving and processing FISes and raising interrupts are not interlocked and spurious interrupts are expected. For example, if an interrupt occurs while interrupt handler is running and the running interrupt handler handles the event the new IRQ indicated, after IRQ handler finishes, it will be executed again because IRQ pending bit is set by the new interrupt but there won't be anything to process. Please read the following message for more information. http://article.gmane.org/gmane.linux.ide/26012 This patch... * Removes all spurious IRQ whining from ahci. Spurious NCQ completion detection was completely wrong. Spurious D2H Register FIS taught us that some early drives send spurious D2H Register FIS with I bit set while NCQ commands are in progress but none of recent drives does that and even the ones which show such behavior can do NCQ fine. * Kills all NCQ blacklist entries which were added because of spurious NCQ completions. I tracked down each commit and verified all removed ones are actually added because of spurious completions. WD740ADFD-00NLR1 wasn't deleted but moved upward because the drive not only had spurious NCQ completions but also is slow on sequential data transfers if NCQ is enabled. Maxtor 7V300F0 was added by 0e3dbc01d53940fe10e5a5cfec15ede3e929c918 from Alan Cox. I can only find evidences that the drive only had troubles with spuruious completions by searching the mailing list. This entry needs to be verified and removed if it doesn't have other NCQ related problems. Signed-off-by: Tejun Heo Cc: Alan Cox Signed-off-by: Jeff Garzik Signed-off-by: Greg Kroah-Hartman

libata: update drive blacklists

2007-10-10T17:50:15+00:00

Update the libata drive blacklists to the latest in 2.6.23-rc8. Signed-off-by: Chuck Ebbert Cc: Jeff Garzik Signed-off-by: Greg Kroah-Hartman

libata: add ATI SB700 device IDs to AHCI driver

2007-08-22T23:23:26+00:00

The SATA controller device ID is different according to the onchip SATA type set in the system BIOS: Device Device ID SATA in IDE mode 0x4390 SATA in AHCI mode 0x4391 SATA in non-raid5 driver 0x4392 SATA in raid5 driver 0x4393 Although the device ID is different, they use the same AHCI driver .The attached file is the patch for adding these device IDs for ATI SB700. Signed-off-by: su henry Signed-off-by: Jeff Garzik Cc: Chuck Ebbert Signed-off-by: Greg Kroah-Hartman

pata_atiixp: add SB700 PCI ID

2007-08-15T16:25:10+00:00

[libata] pata_atiixp: add SB700 PCI ID From AMD. Signed-off-by: Jeff Garzik Cc: Chuck Ebbert Signed-off-by: Greg Kroah-Hartman

ata_piix: update map 10b for ich8m

2007-08-15T16:25:09+00:00

Fix map entry 10b for ich8. It's [P0 P2 IDE IDE] like ich6 / ich6m. Signed-off-by: Tejun Heo Acked-by: Kristen Carlson Accardi Cc: Jeff Garzik Signed-off-by: Greg Kroah-Hartman

libata: add FUJITSU MHV2080BH to NCQ blacklist

2007-08-09T21:27:42+00:00

Please warmly welcome the first member from FUJITSU to the prestigious NCQ spurious completion club. This is reported by Serge Van Thillo in bugzilla bug 8730. http://bugzilla.kernel.org/show_bug.cgi?id=8730 Signed-off-by: Tejun Heo Cc: Serge van Thillo Cc: Jeff Garzik Signed-off-by: Greg Kroah-Hartman

Fix reported task file values in sense data

2007-08-09T21:27:30+00:00

ata_tf_read was setting HOB bit when lba48 command was submitted, but was not clearing it before reading "normal" data. As it is only place which sets HOB bit in control register, and register reads should not be affected by other bits, let's just clear it when we are done with reading upper bytes so non-48bit commands do not have to touch ctl at all. pata_scc suffered from same problem... Signed-off-by: Petr Vandrovec Signed-off-by: Jeff Garzik Signed-off-by: Greg Kroah-Hartman

Add a PCI ID for santa rosa's PATA controller.

2007-08-09T21:27:26+00:00

This is commit c1e6f28cc5de37dcd113b9668a185c0b9334ba8a which is merged during 23-rc1 window. Considering the popularity of these chips, I think including it in -stable release would be good idea. Signed-off-by: Christian Lamparter Signed-off-by: Jeff Garzik Signed-off-by: Greg Kroah-Hartman