kernel/linux.git/drivers/acpi/pmic, branch v5.10.257

ACPI: PMIC: Remove unneeded check in tps68470_pmic_opregion_probe()

2024-10-17T13:07:38+00:00

[ Upstream commit 07442c46abad1d50ac82af5e0f9c5de2732c4592 ] In tps68470_pmic_opregion_probe() pointer 'dev' is compared to NULL which is useless. Fix this issue by removing unneeded check. Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: e13452ac3790 ("ACPI / PMIC: Add TI PMIC TPS68470 operation region driver") Suggested-by: Andy Shevchenko Signed-off-by: Aleksandr Mishin Reviewed-by: Sakari Ailus Reviewed-by: Andy Shevchenko Link: https://patch.msgid.link/20240730225339.13165-1-amishin@t-argos.ru [ rjw: Subject edit ] Signed-off-by: Rafael J. Wysocki Signed-off-by: Sasha Levin

ACPI: PMIC: Fix intel_pmic_regs_handler() read accesses

2021-11-18T13:04:26+00:00

[ Upstream commit 009a789443fe4c8e6b1ecb7c16b4865c026184cd ] The handling of PMIC register reads through writing 0 to address 4 of the OpRegion is wrong. Instead of returning the read value through the value64, which is a no-op for function == ACPI_WRITE calls, store the value and then on a subsequent function == ACPI_READ with address == 3 (the address for the value field of the OpRegion) return the stored value. This has been tested on a Xiaomi Mi Pad 2 and makes the ACPI battery dev there mostly functional (unfortunately there are still other issues). Here are the SET() / GET() functions of the PMIC ACPI device, which use this OpRegion, which clearly show the new behavior to be correct: OperationRegion (REGS, 0x8F, Zero, 0x50) Field (REGS, ByteAcc, NoLock, Preserve) { CLNT, 8, SA, 8, OFF, 8, VAL, 8, RWM, 8 } Method (GET, 3, Serialized) { If ((AVBE == One)) { CLNT = Arg0 SA = Arg1 OFF = Arg2 RWM = Zero If ((AVBG == One)) { GPRW = Zero } } Return (VAL) /* \_SB_.PCI0.I2C7.PMI5.VAL_ */ } Method (SET, 4, Serialized) { If ((AVBE == One)) { CLNT = Arg0 SA = Arg1 OFF = Arg2 VAL = Arg3 RWM = One If ((AVBG == One)) { GPRW = One } } } Fixes: 0afa877a5650 ("ACPI / PMIC: intel: add REGS operation region support") Signed-off-by: Hans de Goede Signed-off-by: Rafael J. Wysocki Signed-off-by: Sasha Levin

ACPI / PMIC: Move TPS68470 OpRegion driver to drivers/acpi/pmic/

2020-09-15T17:40:59+00:00

It is revealed now that TPS68470 OpRegion driver has been added in slightly different scope. Let's move it to the drivers/acpi/pmic/ folder for sake of the unification. Signed-off-by: Andy Shevchenko Reviewed-by: Mika Westerberg Signed-off-by: Rafael J. Wysocki

ACPI / PMIC: Split out Kconfig and Makefile specific for ACPI PMIC

2020-09-15T17:40:59+00:00

It's a bit better to maintain and allows to avoid mistakes in the future with PMIC OpRegion drivers, if we split out Kconfig and Makefile for ACPI PMIC to its own folder. Signed-off-by: Andy Shevchenko Reviewed-by: Mika Westerberg Signed-off-by: Rafael J. Wysocki

ACPI / PMIC: Add i2c address for thermal control

2020-05-18T10:57:24+00:00

On Asus T101HA, we keep receiving those error messages: i915 0000:00:02.0: [drm] *ERROR* mipi_exec_pmic failed, error: -95 intel_soc_pmic_exec_mipi_pmic_seq_element: Not implemented intel_soc_pmic_exec_mipi_pmic_seq_element: i2c-addr: 0x5e reg-addr 0x4b value 0x59 mask 0xff Because the opregion is missing the I2C address. Suggested-by: Hans de Goede Signed-off-by: Mauro Carvalho Chehab Reviewed-by: Hans de Goede Reviewed-by: Mika Westerberg Reviewed-by: Andy Shevchenko Signed-off-by: Rafael J. Wysocki

ACPI / PMIC: Add Cherry Trail Crystal Cove PMIC OpRegion driver

2019-10-25T09:43:08+00:00

We have no docs for the CHT Crystal Cove PMIC. The Asus Zenfone-2 kernel code has 2 Crystal Cove regulator drivers, one calls the PMIC a "Crystal Cove Plus" PMIC and talks about Cherry Trail, so presuambly that one could be used to get register info for the regulators if we need to implement regulator support in the future. For now the sole purpose of this driver is to make intel_soc_pmic_exec_mipi_pmic_seq_element work on devices with a CHT Crystal Cove PMIC. Specifically this fixes the following MIPI PMIC sequence related errors on e.g. an Asus T100HA: [ 178.211801] intel_soc_pmic_exec_mipi_pmic_seq_element: No PMIC registered [ 178.211897] [drm:intel_dsi_dcs_init_backlight_funcs [i915]] *ERROR* mipi_exec_pmic failed, error: -6 Signed-off-by: Hans de Goede Reviewed-by: Andy Shevchenko Signed-off-by: Rafael J. Wysocki

ACPI / PMIC: Add byt prefix to Crystal Cove PMIC OpRegion driver

2019-10-25T09:43:08+00:00

Our current Crystal Cove OpRegion driver is only valid for the Crystal Cove PMIC variant found on Bay Trail (BYT) boards, Cherry Trail (CHT) based boards use another variant. At least the regulator registers are different on CHT and these registers are one of the things controlled by the custom PMIC OpRegion. Commit 4d9ed62ab142 ("mfd: intel_soc_pmic: Export separate mfd-cell configs for BYT and CHT") has disabled the intel_pmic_crc.c code for CHT devices by removing the "crystal_cove_pmic" MFD cell on CHT devices. This commit renames the intel_pmic_crc.c driver and the cell to be prefixed with "byt" to indicate that this code is for BYT devices only. This is a preparation patch for adding a separate PMIC OpRegion driver for the CHT variant of the Crystal Cove PMIC (sometimes called Crystal Cove Plus in Android kernel sources). Signed-off-by: Hans de Goede Reviewed-by: Andy Shevchenko Signed-off-by: Rafael J. Wysocki

ACPI / PMIC: Do not register handlers for unhandled OpRegions

2019-10-25T09:43:08+00:00

For some model PMIC's used on Intel boards we do not know how to handle the power or thermal opregions because we have no documentation. For example in the intel_pmic_chtwc.c driver thermal_table_count is 0, which means that our PMIC_THERMAL_OPREGION_ID handler will always fail with AE_BAD_PARAMETER, in this case it is better to simply not register the handler at all. Signed-off-by: Hans de Goede Reviewed-by: Andy Shevchenko Signed-off-by: Rafael J. Wysocki

ACPI / PMIC: intel: Drop double removal of address space handler

2019-07-03T11:03:41+00:00

There is no need to remove address space handler twice, because removal is idempotent. Signed-off-by: Andy Shevchenko Signed-off-by: Rafael J. Wysocki

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174

2019-05-30T18:26:41+00:00

Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 655 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Reviewed-by: Kate Stewart Reviewed-by: Richard Fontana Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de Signed-off-by: Greg Kroah-Hartman