Linux kernel stable tree (mirror) https://git.radix-linux.su/kernel/linux.git/atom?h=v6.13.6 2024-11-15T19:45:14+00:00 2024-11-15T19:45:14+00:00 Rafael J. Wysocki rafael.j.wysocki@intel.com 2024-11-15T19:45:14+00:00 urn:sha1:1c58e3a528c2c2b8b8a6798f8d3b742c42c56313 Merge updates of the ACPI battery and EC drivers, an ACPI Platform Firmware Runtime (PFR) telemetry driver update and an ACPI OS support layer change for 6.13-rc1: - Use DEFINE_SIMPLE_DEV_PM_OPS in the ACPI battery driver, make it use devm_ for initializing mutexes and allocating driver data, and make it check the register_pm_notifier() return value (Thomas Weißschuh, Andy Shevchenko). - Make the ACPI EC driver support compile-time conditional and allow ACPI to be built without CONFIG_HAS_IOPORT (Arnd Bergmann). - Remove a redundant error check from the pfr_telemetry driver (Colin Ian King). * acpi-battery: ACPI: battery: Check for error code from devm_mutex_init() call ACPI: battery: use DEFINE_SIMPLE_DEV_PM_OPS ACPI: battery: initialize mutexes through devm_ APIs ACPI: battery: allocate driver data through devm_ APIs ACPI: battery: check result of register_pm_notifier() * acpi-ec: ACPI: EC: make EC support compile-time conditional * acpi-pfr: ACPI: pfr_telemetry: remove redundant error check on ret * acpi-osl: ACPI: allow building without CONFIG_HAS_IOPORT 2024-11-13T11:45:23+00:00 Lifeng Zheng zhenglifeng1@huawei.com 2024-11-13T10:33:09+00:00 urn:sha1:2388b266c9fcc7c9169ba85c7f9ebe325b7622d7 Since commit 60949b7b8054 ("ACPI: CPPC: Fix MASK_VAL() usage"), _CPC registers cannot be changed from 1 to 0. It turns out that there is an extra OR after MASK_VAL_WRITE(), which has already ORed prev_val with the register mask. Remove the extra OR to fix the problem. Fixes: 60949b7b8054 ("ACPI: CPPC: Fix MASK_VAL() usage") Signed-off-by: Lifeng Zheng <zhenglifeng1@huawei.com> Link: https://patch.msgid.link/20241113103309.761031-1-zhenglifeng1@huawei.com [ rjw: Subject and changelog edits ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> 2024-11-06T20:31:36+00:00 Mario Limonciello mario.limonciello@amd.com 2024-11-04T22:28:55+00:00 urn:sha1:b79276dcac9124a79c8cf7cc8fbdd3d4c3c9a7c7 arch_init_invariance_cppc() is called at the end of acpi_cppc_processor_probe() in order to configure frequency invariance based upon the values from _CPC. This however doesn't work on AMD CPPC shared memory designs that have AMD preferred cores enabled because _CPC needs to be analyzed from all cores to judge if preferred cores are enabled. This issue manifests to users as a warning since commit 21fb59ab4b97 ("ACPI: CPPC: Adjust debug messages in amd_set_max_freq_ratio() to warn"): ``` Could not retrieve highest performance (-19) ``` However the warning isn't the cause of this, it was actually commit 279f838a61f9 ("x86/amd: Detect preferred cores in amd_get_boost_ratio_numerator()") which exposed the issue. To fix this problem, change arch_init_invariance_cppc() into a new weak symbol that is called at the end of acpi_processor_driver_init(). Each architecture that supports it can declare the symbol to override the weak one. Define it for x86, in arch/x86/kernel/acpi/cppc.c, and for all of the architectures using the generic arch_topology.c code. Fixes: 279f838a61f9 ("x86/amd: Detect preferred cores in amd_get_boost_ratio_numerator()") Reported-by: Ivan Shapovalov <intelfx@intelfx.name> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=219431 Tested-by: Oleksandr Natalenko <oleksandr@natalenko.name> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://patch.msgid.link/20241104222855.3959267-1-superm1@kernel.org [ rjw: Changelog edit ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> 2024-11-05T20:41:10+00:00 Arnd Bergmann arnd@arndb.de 2024-10-30T12:36:41+00:00 urn:sha1:4435a125015d3c3d4494a3f4307d23f15d6cb42b CONFIG_HAS_IOPORT will soon become optional and cause a build time failure when it is disabled but a driver calls inb()/outb(). At the moment, all architectures that can support ACPI have port I/O, but this is not necessarily the case in the future on non-x86 architectures. The result is a set of errors like: drivers/acpi/osl.c: In function 'acpi_os_read_port': include/asm-generic/io.h:542:14: error: call to '_inb' declared with attribute error: inb()) requires CONFIG_HAS_IOPORT Nothing should actually call these functions in this configuration, and if it does, the result would be undefined behavior today, possibly a NULL pointer dereference. Change the low-level functions to return a proper error code when HAS_IOPORT is disabled. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20241030123701.1538919-2-arnd@kernel.org Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> 2024-10-29T11:56:19+00:00 Pierre Gondois pierre.gondois@arm.com 2024-10-28T12:56:56+00:00 urn:sha1:1c10941e34c5fdc0357e46a25bd130d9cf40b925 The following BUG was triggered: ============================= [ BUG: Invalid wait context ] 6.12.0-rc2-XXX #406 Not tainted ----------------------------- kworker/1:1/62 is trying to lock: ffffff8801593030 (&cpc_ptr->rmw_lock){+.+.}-{3:3}, at: cpc_write+0xcc/0x370 other info that might help us debug this: context-{5:5} 2 locks held by kworker/1:1/62: #0: ffffff897ef5ec98 (&rq->__lock){-.-.}-{2:2}, at: raw_spin_rq_lock_nested+0x2c/0x50 #1: ffffff880154e238 (&sg_policy->update_lock){....}-{2:2}, at: sugov_update_shared+0x3c/0x280 stack backtrace: CPU: 1 UID: 0 PID: 62 Comm: kworker/1:1 Not tainted 6.12.0-rc2-g9654bd3e8806 #406 Workqueue: 0x0 (events) Call trace: dump_backtrace+0xa4/0x130 show_stack+0x20/0x38 dump_stack_lvl+0x90/0xd0 dump_stack+0x18/0x28 __lock_acquire+0x480/0x1ad8 lock_acquire+0x114/0x310 _raw_spin_lock+0x50/0x70 cpc_write+0xcc/0x370 cppc_set_perf+0xa0/0x3a8 cppc_cpufreq_fast_switch+0x40/0xc0 cpufreq_driver_fast_switch+0x4c/0x218 sugov_update_shared+0x234/0x280 update_load_avg+0x6ec/0x7b8 dequeue_entities+0x108/0x830 dequeue_task_fair+0x58/0x408 __schedule+0x4f0/0x1070 schedule+0x54/0x130 worker_thread+0xc0/0x2e8 kthread+0x130/0x148 ret_from_fork+0x10/0x20 sugov_update_shared() locks a raw_spinlock while cpc_write() locks a spinlock. To have a correct wait-type order, update rmw_lock to a raw spinlock and ensure that interrupts will be disabled on the CPU holding it. Fixes: 60949b7b8054 ("ACPI: CPPC: Fix MASK_VAL() usage") Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Link: https://patch.msgid.link/20241028125657.1271512-1-pierre.gondois@arm.com [ rjw: Changelog edits ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> 2024-10-24T15:35:13+00:00 liwei liwei728@huawei.com 2024-10-24T02:29:52+00:00 urn:sha1:d93df29bdab133b85e94b3c328e7fe26a0ebd56c When the nominal_freq recorded by the kernel is equal to the lowest_freq, and the frequency adjustment operation is triggered externally, there is a logic error in cppc_perf_to_khz()/cppc_khz_to_perf(), resulting in perf and khz conversion errors. Fix this by adding a branch processing logic when nominal_freq is equal to lowest_freq. Fixes: ec1c7ad47664 ("cpufreq: CPPC: Fix performance/frequency conversion") Signed-off-by: liwei <liwei728@huawei.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://patch.msgid.link/20241024022952.2627694-1-liwei728@huawei.com [ rjw: Subject and changelog edits ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> 2024-10-02T21:23:23+00:00 Al Viro viro@zeniv.linux.org.uk 2024-10-01T19:35:57+00:00 urn:sha1:5f60d5f6bbc12e782fac78110b0ee62698f3b576 asm/unaligned.h is always an include of asm-generic/unaligned.h; might as well move that thing to linux/unaligned.h and include that - there's nothing arch-specific in that header. auto-generated by the following: for i in `git grep -l -w asm/unaligned.h`; do sed -i -e "s/asm\/unaligned.h/linux\/unaligned.h/" $i done for i in `git grep -l -w asm-generic/unaligned.h`; do sed -i -e "s/asm-generic\/unaligned.h/linux\/unaligned.h/" $i done git mv include/asm-generic/unaligned.h include/linux/unaligned.h git mv tools/include/asm-generic/unaligned.h tools/include/linux/unaligned.h sed -i -e "/unaligned.h/d" include/asm-generic/Kbuild sed -i -e "s/__ASM_GENERIC/__LINUX/" include/linux/unaligned.h tools/include/linux/unaligned.h 2024-09-10T18:25:28+00:00 Mario Limonciello mario.limonciello@amd.com 2024-09-10T03:15:24+00:00 urn:sha1:aaf21ac93909e08a12931173336bdb52ac8499f1 Some Asus AMD systems are reported to not be able to change EPP values because the BIOS doesn't advertise support for the CPPC MSR and the PCC region is not configured. However the ACPI 6.2 specification allows CPC registers to be declared in FFH: ``` Starting with ACPI Specification 6.2, all _CPC registers can be in PCC, System Memory, System IO, or Functional Fixed Hardware address spaces. OSPM support for this more flexible register space scheme is indicated by the “Flexible Address Space for CPPC Registers” _OSC bit. ``` If this _OSC has been set allow using FFH to configure EPP. Reported-by: al0uette@outlook.com Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218686 Suggested-by: al0uette@outlook.com Tested-by: vderp@icloud.com Tested-by: al0uette@outlook.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://patch.msgid.link/20240910031524.106387-1-superm1@kernel.org Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> 2024-09-02T12:24:40+00:00 Clément Léger cleger@rivosinc.com 2024-08-26T10:16:44+00:00 urn:sha1:60949b7b805424f21326b450ca4f1806c06d982e MASK_VAL() was added as a way to handle bit_offset and bit_width for registers located in system memory address space. However, while suited for reading, it does not work for writing and result in corrupted registers when writing values with bit_offset > 0. Moreover, when a register is collocated with another one at the same address but with a different mask, the current code results in the other registers being overwritten with 0s. The write procedure for SYSTEM_MEMORY registers should actually read the value, mask it, update it and write it with the updated value. Moreover, since registers can be located in the same word, we must take care of locking the access before doing it. We should potentially use a global lock since we don't know in if register addresses aren't shared with another _CPC package but better not encourage vendors to do so. Assume that registers can use the same word inside a _CPC package and thus, use a per _CPC package lock. Fixes: 2f4a4d63a193 ("ACPI: CPPC: Use access_width over bit_width for system memory accesses") Signed-off-by: Clément Léger <cleger@rivosinc.com> Link: https://patch.msgid.link/20240826101648.95654-1-cleger@rivosinc.com [ rjw: Dropped redundant semicolon ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> 2024-07-02T19:01:08+00:00 Prabhakar Pujeri prabhakar.pujeri@gmail.com 2024-06-26T13:09:40+00:00 urn:sha1:86932cd8ccd4add4ddb3e894a0c4471aab8233c2 Replace ternary operator with umax() in cppc_find_dmi_mhz(). Signed-off-by: Prabhakar Pujeri <prabhakar.pujeri@gmail.com> [ rjw: Subject and changelog edits ] Link: https://patch.msgid.link/20240626130941.1527127-2-prabhakar.pujeri@gmail.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>