kernel/linux.git/arch/xtensa/mm/Makefile, branch linux-4.16.y

xtensa: add support for KASAN

2017-12-17T06:37:12+00:00

Cover kernel addresses above 0x90000000 by the shadow map. Enable HAVE_ARCH_KASAN when MMU is enabled. Provide kasan_early_init that fills shadow map with writable copies of kasan_zero_page. Call kasan_early_init right after mmu initialization in the setup_arch. Provide kasan_init that allocates proper shadow map pages from the memblock and puts these pages into the shadow map for addresses from VMALLOC area to the end of KSEG. Call kasan_init right after memblock initialization. Don't use KASAN for the boot code, MMU and KASAN initialization and page fault handler. Make kernel stack size 4 times larger when KASAN is enabled to avoid stack overflows. GCC 7.3, 8 or newer is required to build the xtensa kernel with KASAN. Signed-off-by: Max Filippov

xtensa: support ioremap for memory outside KIO region

2016-01-11T14:37:36+00:00

Map physical memory outside KIO region into the vmalloc area. Unmap it with vunmap. Signed-off-by: Max Filippov

xtensa: nommu: don't build most of the cache flushing code

2014-10-21T09:28:50+00:00

Most cache flushing code is only relevant for MMU. Don't build it for nommu configuration. Signed-off-by: Max Filippov

xtensa: add HIGHMEM support

2014-04-06T17:29:21+00:00

Introduce fixmap area just below the vmalloc region. Use it for atomic mapping of high memory pages. High memory on cores with cache aliasing is not supported and is still to be implemented. Fail build for such configurations for now. Signed-off-by: Max Filippov

xtensa: nommu support

2009-04-03T06:41:50+00:00

Add support for !CONFIG_MMU setups. Signed-off-by: Johannes Weiner Signed-off-by: Chris Zankel

Remove references to "make dep"

2008-01-28T22:22:13+00:00

"make dep" is no longer required in kernel 2.6, but was still mentioned in some places. Signed-off-by: Adrian Bunk Signed-off-by: Sam Ravnborg

[XTENSA] Add support for cache-aliasing

2007-08-27T20:54:16+00:00

Add support for processors that have cache-aliasing issues, such as the Stretch S5000 processor. Cache-aliasing means that the size of the cache (for one way) is larger than the page size, thus, a page can end up in several places in cache depending on the virtual to physical translation. The method used here is to map a user page temporarily through the auto-refill way 0 and of of the DTLB. We probably will want to revisit this issue and use a better approach with kmap/kunmap. Signed-off-by: Chris Zankel

[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 5

2005-06-24T07:05:22+00:00

The attached patches provides part 5 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds