<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/arch/xtensa/include/asm/processor.h, branch v5.10.258</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.10.258</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.10.258'/>
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<updated>2022-04-08T12:39:58+00:00</updated>
<entry>
<title>xtensa: fix xtensa_wsr always writing 0</title>
<updated>2022-04-08T12:39:58+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2022-03-20T16:40:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1dd031eb99107bf81aa0e72399717a87da5d0433'/>
<id>urn:sha1:1dd031eb99107bf81aa0e72399717a87da5d0433</id>
<content type='text'>
commit a3d0245c58f962ee99d4440ea0eaf45fb7f5a5cc upstream.

The commit cad6fade6e78 ("xtensa: clean up WSR*/RSR*/get_sr/set_sr")
replaced 'WSR' macro in the function xtensa_wsr with 'xtensa_set_sr',
but variable 'v' in the xtensa_set_sr body shadowed the argument 'v'
passed to it, resulting in wrong value written to debug registers.

Fix that by removing intermediate variable from the xtensa_set_sr
macro body.

Cc: stable@vger.kernel.org
Fixes: cad6fade6e78 ("xtensa: clean up WSR*/RSR*/get_sr/set_sr")
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>xtensa: clean up optional XCHAL_* definitions</title>
<updated>2020-02-01T08:43:28+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2020-02-01T05:20:58+00:00</published>
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<id>urn:sha1:a922b1561137fc516e7c77c478779f7d198cc9cf</id>
<content type='text'>
Simplify users of XCHAL_HAVE_EXTERN_REGS and XCHAL_HAVE_VECBASE and
always define them as 0 if they're not defined in the variant/core.h

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: rearrange syscall tracing</title>
<updated>2019-11-29T22:39:12+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2019-11-25T19:51:45+00:00</published>
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<id>urn:sha1:ba9c1d65991a8be2e160447dd06eb803cbb9ba61</id>
<content type='text'>
system_call saves and restores syscall number across system call to make
clone and execv entry and exit tracing match. This complicates things
when syscall code may be changed by ptrace.
Preserve syscall code in copy_thread and start_thread directly instead of
doing tricks in system_call.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: add support for call0 ABI in userspace</title>
<updated>2019-09-01T20:11:57+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2015-01-12T06:44:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=09f8a6db20e6ed8eab1b2b23d09d2458f6e15062'/>
<id>urn:sha1:09f8a6db20e6ed8eab1b2b23d09d2458f6e15062</id>
<content type='text'>
Provide a Kconfig choice to select whether only the default ABI, only
call0 ABI or both are supported. The default for XEA2 is windowed, but
it may change for XEA3. Call0 only runs userspace with PS.WOE disabled.
Supporting both windowed and call0 ABIs is tricky, as there's no
indication in the ELF binaries which ABI they use. So it is done by
probing: each process is started with PS.WOE disabled, but the handler
of an illegal instruction exception taken with PS.WOE retries faulting
instruction after enabling PS.WOE. It must happen before any signal is
delivered to the process, otherwise it may be delivered incorrectly.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: clean up PS_WOE_BIT usage</title>
<updated>2019-09-01T20:11:57+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2019-08-30T18:16:06+00:00</published>
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<id>urn:sha1:9e1e41c44782741c727688a19e5624d039b0de7e</id>
<content type='text'>
PS_WOE_BIT is mainly used to generate PS.WOE mask in the code. Introduce
PS_WOE_MASK macro and use it instead.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: replace variant/core.h with asm/core.h</title>
<updated>2019-05-07T00:48:55+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2019-01-02T03:41:55+00:00</published>
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<id>urn:sha1:8f8d5745bb520c76b81abef4a2cb3023d0313bfd</id>
<content type='text'>
Introduce the header arch/xtensa/include/asm/core.h that provides
definitions for XCHAL macros missing in older xtensa releases. Use this
header instead of variant/core.h

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: fix initialization of pt_regs::syscall in start_thread</title>
<updated>2019-04-04T06:18:39+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2019-04-04T03:22:42+00:00</published>
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<id>urn:sha1:2663147dc7465cb29040a05cc4286fdd839978b5</id>
<content type='text'>
New pt_regs should indicate that there's no syscall, not that there's
syscall #0. While at it wrap macro body in do/while and parenthesize
macro arguments.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: clean up WSR*/RSR*/get_sr/set_sr</title>
<updated>2018-12-04T22:08:11+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2018-11-28T00:27:47+00:00</published>
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<id>urn:sha1:cad6fade6e78030e60188da3f18090577daa9243</id>
<content type='text'>
WSR and RSR are too generic and collide with other macro definitions in
the kernel causing warnings in allmodconfig builds. Drop WSR and RSR
macros and WSR_* and RSR_* variants. Change get_sr and set_sr to
xtensa_get_sr and xtensa_set_sr. Fix up users.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'xtensa-20181115' of git://github.com/jcmvbkbc/linux-xtensa</title>
<updated>2018-11-16T16:10:27+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2018-11-16T16:10:27+00:00</published>
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<id>urn:sha1:50d25bdc64318a8a367c4433fa1e030c38331f05</id>
<content type='text'>
Pull Xtensa fixes from Max Filippov:

 - fix stack alignment for bFLT binaries.

 - fix physical-to-virtual address translation for boot parameters in
   MMUv3 256+256 and 512+512 virtual memory layouts.

* tag 'xtensa-20181115' of git://github.com/jcmvbkbc/linux-xtensa:
  xtensa: fix boot parameters address translation
  xtensa: make sure bFLT stack is 16 byte aligned
</content>
</entry>
<entry>
<title>xtensa: make sure bFLT stack is 16 byte aligned</title>
<updated>2018-11-05T22:49:04+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2018-11-04T08:46:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0773495b1f5f1c5e23551843f87b5ff37e7af8f7'/>
<id>urn:sha1:0773495b1f5f1c5e23551843f87b5ff37e7af8f7</id>
<content type='text'>
Xtensa ABI requires stack alignment to be at least 16. In noMMU
configuration ARCH_SLAB_MINALIGN is used to align stack. Make it at
least 16.

This fixes the following runtime error in noMMU configuration, caused by
interaction between insufficiently aligned stack and alloca function,
that results in corruption of on-stack variable in the libc function
glob:

 Caught unhandled exception in 'sh' (pid = 47, pc = 0x02d05d65)
  - should not happen
  EXCCAUSE is 15

Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
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