<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/arch/xtensa/include/asm/atomic.h, branch v6.12.80</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2023-06-05T07:57:18+00:00</updated>
<entry>
<title>locking/atomic: xtensa: add preprocessor symbols</title>
<updated>2023-06-05T07:57:18+00:00</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2023-06-05T07:01:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7c7084f3ba4031a9c2858afed696a577fcfe41d2'/>
<id>urn:sha1:7c7084f3ba4031a9c2858afed696a577fcfe41d2</id>
<content type='text'>
Some atomics can be implemented in several different ways, e.g.
FULL/ACQUIRE/RELEASE ordered atomics can be implemented in terms of
RELAXED atomics, and ACQUIRE/RELEASE/RELAXED can be implemented in terms
of FULL ordered atomics. Other atomics are optional, and don't exist in
some configurations (e.g. not all architectures implement the 128-bit
cmpxchg ops).

Subsequent patches will require that architectures define a preprocessor
symbol for any atomic (or ordering variant) which is optional. This will
make the fallback ifdeffery more robust, and simplify future changes.

Add the required definitions to arch/xtensa.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Reviewed-by: Kees Cook &lt;keescook@chromium.org&gt;
Link: https://lore.kernel.org/r/20230605070124.3741859-14-mark.rutland@arm.com
</content>
</entry>
<entry>
<title>locking/atomic: make atomic*_{cmp,}xchg optional</title>
<updated>2023-06-05T07:57:14+00:00</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2023-06-05T07:01:01+00:00</published>
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<id>urn:sha1:d12157efc8e083c77d054675fcdd594f54cc7e2b</id>
<content type='text'>
Most architectures define the atomic/atomic64 xchg and cmpxchg
operations in terms of arch_xchg and arch_cmpxchg respectfully.

Add fallbacks for these cases and remove the trivial cases from arch
code. On some architectures the existing definitions are kept as these
are used to build other arch_atomic*() operations.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Reviewed-by: Kees Cook &lt;keescook@chromium.org&gt;
Link: https://lore.kernel.org/r/20230605070124.3741859-5-mark.rutland@arm.com
</content>
</entry>
<entry>
<title>xtensa: use a14 instead of a15 in inline assembly</title>
<updated>2021-10-19T05:19:34+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2021-07-24T06:17:04+00:00</published>
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<id>urn:sha1:eda8dd1224d6c1c89eb6b687264da9ccfbffb0fd</id>
<content type='text'>
a15 is a frame pointer in the call0 xtensa ABI, don't use it explicitly
in the inline assembly. Use a14 instead, as it has the same properties
as a15 w.r.t. window overflow.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>locking/atomic: xtensa: move to ARCH_ATOMIC</title>
<updated>2021-05-26T11:20:52+00:00</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2021-05-25T14:02:30+00:00</published>
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<id>urn:sha1:b9b12978a8e9a4bb77746e74eae37e587f7f8994</id>
<content type='text'>
We'd like all architectures to convert to ARCH_ATOMIC, as once all
architectures are converted it will be possible to make significant
cleanups to the atomics headers, and this will make it much easier to
generically enable atomic functionality (e.g. debug logic in the
instrumented wrappers).

As a step towards that, this patch migrates xtensa to ARCH_ATOMIC. The
arch code provides arch_{atomic,atomic64,xchg,cmpxchg}*(), and common
code wraps these with optional instrumentation to provide the regular
functions.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Acked-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Cc: Boqun Feng &lt;boqun.feng@gmail.com&gt;
Cc: Chris Zankel &lt;chris@zankel.net&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Link: https://lore.kernel.org/r/20210525140232.53872-32-mark.rutland@arm.com
</content>
</entry>
<entry>
<title>locking/atomic: Move ATOMIC_INIT into linux/types.h</title>
<updated>2020-07-29T14:14:18+00:00</updated>
<author>
<name>Herbert Xu</name>
<email>herbert@gondor.apana.org.au</email>
</author>
<published>2020-07-29T12:31:05+00:00</published>
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<id>urn:sha1:7ca8cf5347f720b07a0b32a924b768f5710547e7</id>
<content type='text'>
This patch moves ATOMIC_INIT from asm/atomic.h into linux/types.h.
This allows users of atomic_t to use ATOMIC_INIT without having to
include atomic.h as that way may lead to header loops.

Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Acked-by: Waiman Long &lt;longman@redhat.com&gt;
Link: https://lkml.kernel.org/r/20200729123105.GB7047@gondor.apana.org.au
</content>
</entry>
<entry>
<title>xtensa: use "m" constraint instead of "a" in atomic.h assembly</title>
<updated>2019-11-26T19:33:39+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2019-10-16T07:49:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=13e28135d6fb4906af9cd1d54f22172ad5e4a0dd'/>
<id>urn:sha1:13e28135d6fb4906af9cd1d54f22172ad5e4a0dd</id>
<content type='text'>
Use "m" constraint instead of "r" for the address, as "m" allows
compiler to access adjacent locations using base + offset, while "r"
requires updating the base register every time.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: use named assembly arguments in atomic.h</title>
<updated>2019-11-26T19:33:38+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2019-10-16T07:33:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=643d6976ff0b950fc6e5d65adfda497ba792b149'/>
<id>urn:sha1:643d6976ff0b950fc6e5d65adfda497ba792b149</id>
<content type='text'>
Numeric assembly arguments are hard to understand and assembly code that
uses them is hard to modify. Use named arguments in ATOMIC_OP,
ATOMIC_OP_RETURN and ATOMIC_FETCH_OP macros.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: add exclusive atomics support</title>
<updated>2019-05-07T17:36:31+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2018-12-21T01:18:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f7c34874f04a80d6c39a32f08da2529e59602d3c'/>
<id>urn:sha1:f7c34874f04a80d6c39a32f08da2529e59602d3c</id>
<content type='text'>
Implement atomic primitives using exclusive access opcodes available in
the recent xtensa cores.
Since l32ex/s32ex don't have any memory ordering guarantees don't define
__smp_mb__before_atomic/__smp_mb__after_atomic to make them use memw.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: drop ifdef __KERNEL__ from kernel-only headers</title>
<updated>2019-05-07T00:48:54+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2019-05-06T20:07:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8e65986dcae8c49501c1920064dc192e704248bb'/>
<id>urn:sha1:8e65986dcae8c49501c1920064dc192e704248bb</id>
<content type='text'>
These headers are not exported to userspace, so they're never used
without __KERNEL__ defined. Drop these ifdef statements.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>atomics/treewide: Make unconditional inc/dec ops optional</title>
<updated>2018-06-21T12:25:24+00:00</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2018-06-21T12:13:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9837559d8eb01ce834e56fc9a567c1d94ebd3698'/>
<id>urn:sha1:9837559d8eb01ce834e56fc9a567c1d94ebd3698</id>
<content type='text'>
Many of the inc/dec ops are mandatory, but for most architectures inc/dec are
simply trivial wrappers around their corresponding add/sub ops.

Let's make all the inc/dec ops optional, so that we can get rid of these
boilerplate wrappers.

The instrumented atomics are updated accordingly.

There should be no functional change as a result of this patch.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Reviewed-by: Will Deacon &lt;will.deacon@arm.com&gt;
Acked-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Acked-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
Cc: Boqun Feng &lt;boqun.feng@gmail.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/lkml/20180621121321.4761-17-mark.rutland@arm.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
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