<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/arch/x86/events, branch v6.2</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.2</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.2'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2023-02-15T13:25:44+00:00</updated>
<entry>
<title>perf/x86: Refuse to export capabilities for hybrid PMUs</title>
<updated>2023-02-15T13:25:44+00:00</updated>
<author>
<name>Sean Christopherson</name>
<email>seanjc@google.com</email>
</author>
<published>2023-02-08T20:42:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4b4191b8ae1278bde3642acaaef8f92810ed111a'/>
<id>urn:sha1:4b4191b8ae1278bde3642acaaef8f92810ed111a</id>
<content type='text'>
Now that KVM disables vPMU support on hybrid CPUs, WARN and return zeros
if perf_get_x86_pmu_capability() is invoked on a hybrid CPU.  The helper
doesn't provide an accurate accounting of the PMU capabilities for hybrid
CPUs and needs to be enhanced if KVM, or anything else outside of perf,
wants to act on the PMU capabilities.

Cc: stable@vger.kernel.org
Cc: Andrew Cooper &lt;Andrew.Cooper3@citrix.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Kan Liang &lt;kan.liang@linux.intel.com&gt;
Cc: Andi Kleen &lt;ak@linux.intel.com&gt;
Link: https://lore.kernel.org/all/20220818181530.2355034-1-kan.liang@linux.intel.com
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
Message-Id: &lt;20230208204230.1360502-3-seanjc@google.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>perf/x86/intel/cstate: Add Emerald Rapids</title>
<updated>2023-01-18T11:42:49+00:00</updated>
<author>
<name>Kan Liang</name>
<email>kan.liang@linux.intel.com</email>
</author>
<published>2023-01-06T16:04:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5a8a05f165fb18d37526062419774d9088c2a9b9'/>
<id>urn:sha1:5a8a05f165fb18d37526062419774d9088c2a9b9</id>
<content type='text'>
From the perspective of Intel cstate residency counters,
Emerald Rapids is the same as the Sapphire Rapids and Ice Lake.
Add Emerald Rapids model.

Signed-off-by: Kan Liang &lt;kan.liang@linux.intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Link: https://lore.kernel.org/r/20230106160449.3566477-2-kan.liang@linux.intel.com
</content>
</entry>
<entry>
<title>perf/x86/intel: Add Emerald Rapids</title>
<updated>2023-01-18T11:42:49+00:00</updated>
<author>
<name>Kan Liang</name>
<email>kan.liang@linux.intel.com</email>
</author>
<published>2023-01-06T16:04:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6795e558e9cc6123c24e2100a2ebe88e58a792bc'/>
<id>urn:sha1:6795e558e9cc6123c24e2100a2ebe88e58a792bc</id>
<content type='text'>
From core PMU's perspective, Emerald Rapids is the same as the Sapphire
Rapids. The only difference is the event list, which will be
supported in the perf tool later.

Signed-off-by: Kan Liang &lt;kan.liang@linux.intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Link: https://lore.kernel.org/r/20230106160449.3566477-1-kan.liang@linux.intel.com
</content>
</entry>
<entry>
<title>perf/x86/intel/uncore: Add Emerald Rapids</title>
<updated>2023-01-09T11:00:58+00:00</updated>
<author>
<name>Kan Liang</name>
<email>kan.liang@linux.intel.com</email>
</author>
<published>2023-01-06T16:04:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5268a2842066c227e6ccd94bac562f1e1000244f'/>
<id>urn:sha1:5268a2842066c227e6ccd94bac562f1e1000244f</id>
<content type='text'>
From the perspective of the uncore PMU, the new Emerald Rapids is the
same as the Sapphire Rapids. The only difference is the event list,
which will be supported in the perf tool later.

Signed-off-by: Kan Liang &lt;kan.liang@linux.intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Link: https://lore.kernel.org/r/20230106160449.3566477-4-kan.liang@linux.intel.com
</content>
</entry>
<entry>
<title>perf/x86/msr: Add Emerald Rapids</title>
<updated>2023-01-09T11:00:52+00:00</updated>
<author>
<name>Kan Liang</name>
<email>kan.liang@linux.intel.com</email>
</author>
<published>2023-01-06T16:04:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=69ced4160969025821f2999ff92163ed26568f1c'/>
<id>urn:sha1:69ced4160969025821f2999ff92163ed26568f1c</id>
<content type='text'>
The same as Sapphire Rapids, the SMI_COUNT MSR is also supported on
Emerald Rapids. Add Emerald Rapids model.

Signed-off-by: Kan Liang &lt;kan.liang@linux.intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Link: https://lore.kernel.org/r/20230106160449.3566477-3-kan.liang@linux.intel.com
</content>
</entry>
<entry>
<title>perf/x86/msr: Add Meteor Lake support</title>
<updated>2023-01-09T11:00:52+00:00</updated>
<author>
<name>Kan Liang</name>
<email>kan.liang@linux.intel.com</email>
</author>
<published>2023-01-04T20:13:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6887a4d3aede084bf08b70fbc9736c69fce05d7f'/>
<id>urn:sha1:6887a4d3aede084bf08b70fbc9736c69fce05d7f</id>
<content type='text'>
Meteor Lake is Intel's successor to Raptor lake. PPERF and SMI_COUNT MSRs
are also supported.

Signed-off-by: Kan Liang &lt;kan.liang@linux.intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Reviewed-by: Andi Kleen &lt;ak@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230104201349.1451191-7-kan.liang@linux.intel.com
</content>
</entry>
<entry>
<title>perf/x86/cstate: Add Meteor Lake support</title>
<updated>2023-01-09T11:00:51+00:00</updated>
<author>
<name>Kan Liang</name>
<email>kan.liang@linux.intel.com</email>
</author>
<published>2023-01-04T20:13:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=01f2ea5bcf89dbd7a6530dbce7f2fb4e327e7006'/>
<id>urn:sha1:01f2ea5bcf89dbd7a6530dbce7f2fb4e327e7006</id>
<content type='text'>
Meteor Lake is Intel's successor to Raptor lake. From the perspective of
Intel cstate residency counters, there is nothing changed compared with
Raptor lake.

Share adl_cstates with Raptor lake.
Update the comments for Meteor Lake.

Signed-off-by: Kan Liang &lt;kan.liang@linux.intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Reviewed-by: Andi Kleen &lt;ak@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230104201349.1451191-6-kan.liang@linux.intel.com
</content>
</entry>
<entry>
<title>perf/x86/rapl: Add support for Intel Emerald Rapids</title>
<updated>2023-01-04T20:00:29+00:00</updated>
<author>
<name>Zhang Rui</name>
<email>rui.zhang@intel.com</email>
</author>
<published>2023-01-04T14:58:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=57512b57dcfaf63c52d8ad2fb35321328cde31b0'/>
<id>urn:sha1:57512b57dcfaf63c52d8ad2fb35321328cde31b0</id>
<content type='text'>
Emerald Rapids RAPL support is the same as previous Sapphire Rapids.
Add Emerald Rapids model for RAPL.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Link: https://lore.kernel.org/r/20230104145831.25498-2-rui.zhang@intel.com
</content>
</entry>
<entry>
<title>perf/x86/rapl: Add support for Intel Meteor Lake</title>
<updated>2023-01-04T20:00:28+00:00</updated>
<author>
<name>Zhang Rui</name>
<email>rui.zhang@intel.com</email>
</author>
<published>2023-01-04T14:58:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f52853a668bfeddd79f319d536a506f68cc2b478'/>
<id>urn:sha1:f52853a668bfeddd79f319d536a506f68cc2b478</id>
<content type='text'>
Meteor Lake RAPL support is the same as previous Sky Lake.
Add Meteor Lake model for RAPL.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Link: https://lore.kernel.org/r/20230104145831.25498-1-rui.zhang@intel.com
</content>
</entry>
<entry>
<title>perf/x86/rapl: Treat Tigerlake like Icelake</title>
<updated>2023-01-03T17:55:35+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2022-12-28T11:34:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c07311b5509f6035f1dd828db3e90ff4859cf3b9'/>
<id>urn:sha1:c07311b5509f6035f1dd828db3e90ff4859cf3b9</id>
<content type='text'>
Since Tigerlake seems to have inherited its cstates and other RAPL power
caps from Icelake, assume it also follows Icelake for its RAPL events.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Stephane Eranian &lt;eranian@google.com&gt;
Cc: Zhang Rui &lt;rui.zhang@intel.com&gt;
Link: https://lore.kernel.org/r/20221228113454.1199118-1-rodrigo.vivi@intel.com
</content>
</entry>
</feed>
