<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/arch/powerpc/include/asm/cputable.h, branch linux-5.3.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-5.3.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-5.3.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2019-10-11T16:36:01+00:00</updated>
<entry>
<title>powerpc/mm: Fixup tlbie vs mtpidr/mtlpidr ordering issue on POWER9</title>
<updated>2019-10-11T16:36:01+00:00</updated>
<author>
<name>Aneesh Kumar K.V</name>
<email>aneesh.kumar@linux.ibm.com</email>
</author>
<published>2019-09-24T03:52:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=470d7abb74b23a33091471efd858f4dba48fcb97'/>
<id>urn:sha1:470d7abb74b23a33091471efd858f4dba48fcb97</id>
<content type='text'>
commit 047e6575aec71d75b765c22111820c4776cd1c43 upstream.

On POWER9, under some circumstances, a broadcast TLB invalidation will
fail to invalidate the ERAT cache on some threads when there are
parallel mtpidr/mtlpidr happening on other threads of the same core.
This can cause stores to continue to go to a page after it's unmapped.

The workaround is to force an ERAT flush using PID=0 or LPID=0 tlbie
flush. This additional TLB flush will cause the ERAT cache
invalidation. Since we are using PID=0 or LPID=0, we don't get
filtered out by the TLB snoop filtering logic.

We need to still follow this up with another tlbie to take care of
store vs tlbie ordering issue explained in commit:
a5d4b5891c2f ("powerpc/mm: Fixup tlbie vs store ordering issue on
POWER9"). The presence of ERAT cache implies we can still get new
stores and they may miss store queue marking flush.

Cc: stable@vger.kernel.org
Signed-off-by: Aneesh Kumar K.V &lt;aneesh.kumar@linux.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20190924035254.24612-3-aneesh.kumar@linux.ibm.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>powerpc/book3s64/radix: Rename CPU_FTR_P9_TLBIE_BUG feature flag</title>
<updated>2019-10-11T16:35:59+00:00</updated>
<author>
<name>Aneesh Kumar K.V</name>
<email>aneesh.kumar@linux.ibm.com</email>
</author>
<published>2019-09-24T03:52:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d3b8b5c87fe13591a30ec577167e5ce33a354144'/>
<id>urn:sha1:d3b8b5c87fe13591a30ec577167e5ce33a354144</id>
<content type='text'>
commit 09ce98cacd51fcd0fa0af2f79d1e1d3192f4cbb0 upstream.

Rename the #define to indicate this is related to store vs tlbie
ordering issue. In the next patch, we will be adding another feature
flag that is used to handles ERAT flush vs tlbie ordering issue.

Fixes: a5d4b5891c2f ("powerpc/mm: Fixup tlbie vs store ordering issue on POWER9")
Cc: stable@vger.kernel.org # v4.16+
Signed-off-by: Aneesh Kumar K.V &lt;aneesh.kumar@linux.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20190924035254.24612-2-aneesh.kumar@linux.ibm.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>powerpc/83xx: handle machine check caused by watchdog timer</title>
<updated>2018-12-22T02:56:41+00:00</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@c-s.fr</email>
</author>
<published>2018-12-10T11:41:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0deae39cec6dab3a66794f3e9e83ca4dc30080f1'/>
<id>urn:sha1:0deae39cec6dab3a66794f3e9e83ca4dc30080f1</id>
<content type='text'>
When the watchdog timer is set in interrupt mode, it causes a
machine check when it times out. The purpose of this mode is to
ease debugging, not to crash the kernel and reboot the machine.

This patch implements a special handling for that, in order to not
crash the kernel if the watchdog times out while in interrupt or
within the idle task.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@c-s.fr&gt;
[scottwood: added missing #include]
Signed-off-by: Scott Wood &lt;oss@buserror.net&gt;
</content>
</entry>
<entry>
<title>powerpc/mm: add exec protection on powerpc 603</title>
<updated>2018-12-19T07:56:32+00:00</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@c-s.fr</email>
</author>
<published>2018-11-28T17:21:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=385e89d5b20f5a7c33fd7c1904da0e6a8e1b366f'/>
<id>urn:sha1:385e89d5b20f5a7c33fd7c1904da0e6a8e1b366f</id>
<content type='text'>
The 603 doesn't have a HASH table, TLB misses are handled by
software. It is then possible to generate page fault when
_PAGE_EXEC is not set like in nohash/32.

There is one "reserved" PTE bit available, this patch uses
it for _PAGE_EXEC.

In order to support it, set_pte_filter() and
set_access_flags_filter() are made common, and the handling
is made dependent on MMU_FTR_HPTE_TABLE

Signed-off-by: Christophe Leroy &lt;christophe.leroy@c-s.fr&gt;
Reviewed-by: Aneesh Kumar K.V &lt;aneesh.kumar@linux.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc: clean inclusions of asm/feature-fixups.h</title>
<updated>2018-07-30T12:48:17+00:00</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@c-s.fr</email>
</author>
<published>2018-07-05T16:25:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=2c86cd188f8a5631f3d75a1dea14d22df85189b4'/>
<id>urn:sha1:2c86cd188f8a5631f3d75a1dea14d22df85189b4</id>
<content type='text'>
files not using feature fixup don't need asm/feature-fixups.h
files using feature fixup need asm/feature-fixups.h

Signed-off-by: Christophe Leroy &lt;christophe.leroy@c-s.fr&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc: move ASM_CONST and stringify_in_c() into asm-const.h</title>
<updated>2018-07-30T12:48:16+00:00</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@c-s.fr</email>
</author>
<published>2018-07-05T16:24:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ec0c464cdbf38bf6ddabec8bfa595bd421cab203'/>
<id>urn:sha1:ec0c464cdbf38bf6ddabec8bfa595bd421cab203</id>
<content type='text'>
This patch moves ASM_CONST() and stringify_in_c() into
dedicated asm-const.h, then cleans all related inclusions.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@c-s.fr&gt;
[mpe: asm-compat.h should include asm-const.h]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>Merge branch 'topic/ppc-kvm' into next</title>
<updated>2018-07-19T04:37:57+00:00</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2018-07-19T04:37:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ce57c6610cc2d7cde61fc005a2d2090bce46fc73'/>
<id>urn:sha1:ce57c6610cc2d7cde61fc005a2d2090bce46fc73</id>
<content type='text'>
Merge in some commits we're sharing with the KVM tree.

I manually propagated the change from commit d3d4ffaae439
("powerpc/powernv/ioda2: Reduce upper limit for DMA window size") into
pci-ioda-tce.c.

Conflicts:
        arch/powerpc/include/asm/cputable.h
        arch/powerpc/platforms/powernv/pci-ioda.c
        arch/powerpc/platforms/powernv/pci.h
</content>
</entry>
<entry>
<title>powerpc/64s: Remove POWER9 DD1 support</title>
<updated>2018-07-16T01:37:21+00:00</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2018-07-05T08:47:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=2bf1071a8d50928a4ae366bb3108833166c2b70c'/>
<id>urn:sha1:2bf1071a8d50928a4ae366bb3108833166c2b70c</id>
<content type='text'>
POWER9 DD1 was never a product. It is no longer supported by upstream
firmware, and it is not effectively supported in Linux due to lack of
testing.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Reviewed-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
[mpe: Remove arch_make_huge_pte() entirely]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc: Remove Power8 DD1 from cputable</title>
<updated>2018-07-12T11:08:09+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2018-07-11T06:02:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e11b64b1ef336f8976e5bf194b0eede48954f419'/>
<id>urn:sha1:e11b64b1ef336f8976e5bf194b0eede48954f419</id>
<content type='text'>
This was added to support an early version of Power8 that did not have
working doorbells. These machines were not publicly available, and all of
the internal users have long since upgraded.

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc: Add TIDR CPU feature for POWER9</title>
<updated>2018-06-03T10:40:31+00:00</updated>
<author>
<name>Alastair D'Silva</name>
<email>alastair@d-silva.org</email>
</author>
<published>2018-05-11T06:12:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=819844285ef2b5d15466f5b5062514135ffba06c'/>
<id>urn:sha1:819844285ef2b5d15466f5b5062514135ffba06c</id>
<content type='text'>
This patch adds a CPU feature bit to show whether the CPU has
the TIDR register available, enabling as_notify/wait in userspace.

Signed-off-by: Alastair D'Silva &lt;alastair@d-silva.org&gt;
Reviewed-by: Frederic Barrat &lt;fbarrat@linux.vnet.ibm.com&gt;
Reviewed-by: Andrew Donnellan &lt;andrew.donnellan@au1.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
</feed>
