<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/arch/openrisc/include, branch v6.6.155</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.155</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.155'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2026-08-23T12:19:58+00:00</updated>
<entry>
<title>openrisc: signal: do not restore privileged SR bits on sigreturn</title>
<updated>2026-08-23T12:19:58+00:00</updated>
<author>
<name>Ali Ahmet Memis</name>
<email>ali@iusegentoo.com</email>
</author>
<published>2026-08-07T23:42:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b4d73c3848bae9084fa8b9b2aa76d99a7d8eb17d'/>
<id>urn:sha1:b4d73c3848bae9084fa8b9b2aa76d99a7d8eb17d</id>
<content type='text'>
commit 32ef1b30ad736519f7a207bcc2986f3d4129d972 upstream.

restore_sigcontext() copies the whole supervision register (SR) from the
signal frame and only clears SPR_SR_SM before the value is reloaded into
the hardware SR (through ESR and l.rfe) on the return to user space.  All
other SR bits are left under user control.

An unprivileged task can thus return from a signal handler through a
crafted sigframe that clears SPR_SR_DME.  With the data MMU disabled the
CPU performs no translation or protection on data accesses, so the task
gains read and write access to arbitrary physical memory, a local
privilege escalation.  SPR_SR_IME, SPR_SR_SUMRA, SPR_SR_LEE, SPR_SR_EPH
and the cache-enable bits are exposed the same way.  The ptrace GPR regset
already refuses any change to SR for exactly this reason.

Restore only the arithmetic flag bits (F, CY, OV) from the signal frame
and take every privileged control bit from the SR the kernel saved on
signal entry.

Verified with qemu-system-or1k -M or1k-sim: before this change an
unprivileged PoC clears SPR_SR_DME in rt_sigreturn and writes a marker to
physical address 0x03000000 (beyond the kernel's mem=32M); afterwards the
same PoC receives SIGSEGV and physical memory is unchanged.

Fixes: ac689eb7f9d4 ("OpenRISC: Signal handling")
Cc: stable@vger.kernel.org
Signed-off-by: Ali Ahmet Memis &lt;ali@iusegentoo.com&gt;
Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>openrisc: define arch-specific version of nop()</title>
<updated>2026-03-04T12:20:46+00:00</updated>
<author>
<name>Brian Masney</name>
<email>bmasney@redhat.com</email>
</author>
<published>2026-01-20T17:07:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f4bf64072c3669501969045eb081cd6bdea21e23'/>
<id>urn:sha1:f4bf64072c3669501969045eb081cd6bdea21e23</id>
<content type='text'>
[ Upstream commit 0dfffa5479d6260d04d021f69203b1926f73d889 ]

When compiling a driver written for MIPS on OpenRISC that uses the nop()
function, it fails due to the following error:

    drivers/watchdog/pic32-wdt.c: Assembler messages:
    drivers/watchdog/pic32-wdt.c:125: Error: unrecognized instruction `nop'

The driver currently uses the generic version of nop() from
include/asm-generic/barrier.h:

    #ifndef nop
    #define nop()   asm volatile ("nop")
    #endif

Let's fix this on OpenRISC by defining an architecture-specific version
of nop().

This was tested by performing an allmodconfig openrisc cross compile on
an aarch64 host.

Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Closes: https://lore.kernel.org/oe-kbuild-all/202601180236.BVy480We-lkp@intel.com/
Signed-off-by: Brian Masney &lt;bmasney@redhat.com&gt;
Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>openrisc: Use asm-generic's version of fix_to_virt() &amp; virt_to_fix()</title>
<updated>2024-12-11T15:13:43+00:00</updated>
<author>
<name>Dawei Li</name>
<email>set_pte_at@outlook.com</email>
</author>
<published>2024-03-09T10:24:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b47d9ffb2d1d03ddb2c6a85dcc62cda519da2726'/>
<id>urn:sha1:b47d9ffb2d1d03ddb2c6a85dcc62cda519da2726</id>
<content type='text'>
commit 7f1e2fc493480086fbb375f4f6d33cb93fc069d6 upstream.

Openrisc's implementation of fix_to_virt() &amp; virt_to_fix() share same
functionality with ones of asm generic.

Plus, generic version of fix_to_virt() can trap invalid index at compile
time.

Thus, Replace the arch-specific implementations with asm generic's ones.

Signed-off-by: Dawei Li &lt;set_pte_at@outlook.com&gt;
Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
Cc: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>openrisc: Implement fixmap to fix earlycon</title>
<updated>2024-12-09T09:31:53+00:00</updated>
<author>
<name>Stafford Horne</name>
<email>shorne@gmail.com</email>
</author>
<published>2024-09-27T14:26:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b18f8d9e282717de81a5d5ba5a12bf5a013e5791'/>
<id>urn:sha1:b18f8d9e282717de81a5d5ba5a12bf5a013e5791</id>
<content type='text'>
[ Upstream commit 1037d186edfc551fa7ba2d4336e74e7575a07a65 ]

With commit 53c98e35dcbc ("openrisc: mm: remove unneeded early ioremap
code") it was commented that early ioremap was not used in OpenRISC.  I
acked this but was wrong, earlycon was using it.  Earlycon setup now
fails with the below trace:

    Kernel command line: earlycon
    ------------[ cut here ]------------
    WARNING: CPU: 0 PID: 0 at mm/ioremap.c:23
    generic_ioremap_prot+0x118/0x130
    Modules linked in:
    CPU: 0 UID: 0 PID: 0 Comm: swapper Not tainted
    6.11.0-rc5-00001-gce02fd891c38-dirty #141
    Call trace:
    [&lt;(ptrval)&gt;] dump_stack_lvl+0x7c/0x9c
    [&lt;(ptrval)&gt;] dump_stack+0x1c/0x2c
    [&lt;(ptrval)&gt;] __warn+0xb4/0x108
    [&lt;(ptrval)&gt;] ? generic_ioremap_prot+0x118/0x130
    [&lt;(ptrval)&gt;] warn_slowpath_fmt+0x60/0x98
    [&lt;(ptrval)&gt;] generic_ioremap_prot+0x118/0x130
    [&lt;(ptrval)&gt;] ioremap_prot+0x20/0x30
    [&lt;(ptrval)&gt;] of_setup_earlycon+0xd4/0x2e0
    [&lt;(ptrval)&gt;] early_init_dt_scan_chosen_stdout+0x18c/0x1c8
    [&lt;(ptrval)&gt;] param_setup_earlycon+0x3c/0x60
    [&lt;(ptrval)&gt;] do_early_param+0xb0/0x118
    [&lt;(ptrval)&gt;] parse_args+0x184/0x4b8
    [&lt;(ptrval)&gt;] ? start_kernel+0x0/0x78c
    [&lt;(ptrval)&gt;] parse_early_options+0x40/0x50
    [&lt;(ptrval)&gt;] ? do_early_param+0x0/0x118
    [&lt;(ptrval)&gt;] parse_early_param+0x48/0x68
    [&lt;(ptrval)&gt;] ? start_kernel+0x318/0x78c
    [&lt;(ptrval)&gt;] ? start_kernel+0x0/0x78c
    ---[ end trace 0000000000000000 ]---

To fix this we could either implement early_ioremap again or implement
fixmap.  In this patch we choose the later option of implementing basic
fixmap support.

While fixing this we also remove the old FIX_IOREMAP slots that were
used by early ioremap code.  That code was also removed by commit
53c98e35dcbc ("openrisc: mm: remove unneeded early ioremap code") but
these definitions were not cleaned up.

Fixes: 53c98e35dcbc ("openrisc: mm: remove unneeded early ioremap code")
Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'for-linus' of https://github.com/openrisc/linux</title>
<updated>2023-09-05T17:09:31+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2023-09-05T17:09:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3dceb8a9a931675d5d19453306c6c76228f2b575'/>
<id>urn:sha1:3dceb8a9a931675d5d19453306c6c76228f2b575</id>
<content type='text'>
Pull OpenRISC updates from Stafford Horne:

 - Fixes from me to cleanup all compiler warnings reported under
   arch/openrisc

 - One cleanup from Linus Walleij to convert pfn macros to static
   inlines

* tag 'for-linus' of https://github.com/openrisc/linux:
  openrisc: Remove kernel-doc marker from ioremap comment
  openrisc: Remove unused tlb_init function
  openriac: Remove unused nommu_dump_state function
  openrisc: Include cpu.h and switch_to.h for prototypes
  openrisc: Add prototype for die to bug.h
  openrisc: Add prototype for show_registers to processor.h
  openrisc: Declare do_signal function as static
  openrisc: Add missing prototypes for assembly called fnctions
  openrisc: Make pfn accessors statics inlines
</content>
</entry>
<entry>
<title>Merge tag 'x86_shstk_for_6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2023-08-31T19:20:12+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2023-08-31T19:20:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=df57721f9a63e8a1fb9b9b2e70de4aa4c7e0cd2e'/>
<id>urn:sha1:df57721f9a63e8a1fb9b9b2e70de4aa4c7e0cd2e</id>
<content type='text'>
Pull x86 shadow stack support from Dave Hansen:
 "This is the long awaited x86 shadow stack support, part of Intel's
  Control-flow Enforcement Technology (CET).

  CET consists of two related security features: shadow stacks and
  indirect branch tracking. This series implements just the shadow stack
  part of this feature, and just for userspace.

  The main use case for shadow stack is providing protection against
  return oriented programming attacks. It works by maintaining a
  secondary (shadow) stack using a special memory type that has
  protections against modification. When executing a CALL instruction,
  the processor pushes the return address to both the normal stack and
  to the special permission shadow stack. Upon RET, the processor pops
  the shadow stack copy and compares it to the normal stack copy.

  For more information, refer to the links below for the earlier
  versions of this patch set"

Link: https://lore.kernel.org/lkml/20220130211838.8382-1-rick.p.edgecombe@intel.com/
Link: https://lore.kernel.org/lkml/20230613001108.3040476-1-rick.p.edgecombe@intel.com/

* tag 'x86_shstk_for_6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (47 commits)
  x86/shstk: Change order of __user in type
  x86/ibt: Convert IBT selftest to asm
  x86/shstk: Don't retry vm_munmap() on -EINTR
  x86/kbuild: Fix Documentation/ reference
  x86/shstk: Move arch detail comment out of core mm
  x86/shstk: Add ARCH_SHSTK_STATUS
  x86/shstk: Add ARCH_SHSTK_UNLOCK
  x86: Add PTRACE interface for shadow stack
  selftests/x86: Add shadow stack test
  x86/cpufeatures: Enable CET CR4 bit for shadow stack
  x86/shstk: Wire in shadow stack interface
  x86: Expose thread features in /proc/$PID/status
  x86/shstk: Support WRSS for userspace
  x86/shstk: Introduce map_shadow_stack syscall
  x86/shstk: Check that signal frame is shadow stack mem
  x86/shstk: Check that SSP is aligned on sigreturn
  x86/shstk: Handle signals for shadow stack
  x86/shstk: Introduce routines modifying shstk
  x86/shstk: Handle thread shadow stack
  x86/shstk: Add user-mode shadow stack support
  ...
</content>
</entry>
<entry>
<title>openrisc: implement the new page table range API</title>
<updated>2023-08-24T23:20:22+00:00</updated>
<author>
<name>Matthew Wilcox (Oracle)</name>
<email>willy@infradead.org</email>
</author>
<published>2023-08-02T15:13:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=063e409dcc37a5834fe94342b3cbcfe17d094eed'/>
<id>urn:sha1:063e409dcc37a5834fe94342b3cbcfe17d094eed</id>
<content type='text'>
Add PFN_PTE_SHIFT, update_mmu_cache_range() and flush_dcache_folio(). 
Change the PG_arch_1 (aka PG_dcache_dirty) flag from being per-page to
per-folio.

Link: https://lkml.kernel.org/r/20230802151406.3735276-20-willy@infradead.org
Signed-off-by: Matthew Wilcox (Oracle) &lt;willy@infradead.org&gt;
Acked-by: Mike Rapoport (IBM) &lt;rppt@kernel.org&gt;
Cc: Jonas Bonn &lt;jonas@southpole.se&gt;
Cc: Stefan Kristiansson &lt;stefan.kristiansson@saunalahti.fi&gt;
Cc: Stafford Horne &lt;shorne@gmail.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>openrisc: convert __pte_free_tlb() to use ptdescs</title>
<updated>2023-08-21T20:37:57+00:00</updated>
<author>
<name>Vishal Moola (Oracle)</name>
<email>vishal.moola@gmail.com</email>
</author>
<published>2023-08-07T23:05:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5823b9fe0451869b4c67a920533d47c5bf1e7628'/>
<id>urn:sha1:5823b9fe0451869b4c67a920533d47c5bf1e7628</id>
<content type='text'>
Part of the conversions to replace pgtable constructor/destructors with
ptdesc equivalents.

Link: https://lkml.kernel.org/r/20230807230513.102486-26-vishal.moola@gmail.com
Signed-off-by: Vishal Moola (Oracle) &lt;vishal.moola@gmail.com&gt;
Acked-by: Mike Rapoport (IBM) &lt;rppt@kernel.org&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Cc: Claudio Imbrenda &lt;imbrenda@linux.ibm.com&gt;
Cc: Dave Hansen &lt;dave.hansen@linux.intel.com&gt;
Cc: David Hildenbrand &lt;david@redhat.com&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Cc: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Cc: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Cc: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Cc: Guo Ren &lt;guoren@kernel.org&gt;
Cc: Huacai Chen &lt;chenhuacai@kernel.org&gt;
Cc: Hugh Dickins &lt;hughd@google.com&gt;
Cc: John Paul Adrian Glaubitz &lt;glaubitz@physik.fu-berlin.de&gt;
Cc: Jonas Bonn &lt;jonas@southpole.se&gt;
Cc: Matthew Wilcox &lt;willy@infradead.org&gt;
Cc: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Cc: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Cc: Richard Weinberger &lt;richard@nod.at&gt;
Cc: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Cc: Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>openrisc: Add prototype for die to bug.h</title>
<updated>2023-08-21T07:15:25+00:00</updated>
<author>
<name>Stafford Horne</name>
<email>shorne@gmail.com</email>
</author>
<published>2023-08-20T20:02:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=31c67b5fabe351644b2612c6ba75da70aeb417b1'/>
<id>urn:sha1:31c67b5fabe351644b2612c6ba75da70aeb417b1</id>
<content type='text'>
When compiling with W=1 enabling -Wmissing-prototypes the compiler
warns:

  arch/openrisc/kernel/traps.c:221:17: sing-prototypesrror: no previous prototype for 'die' [-Werror=missing-prototypes]

Fix by adding the prototype to the appropriate header file and including
the header file in the appropriate C files.

Reported-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Closes: https://lore.kernel.org/linux-kernel/20230810141947.1236730-17-arnd@kernel.org/
Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
</content>
</entry>
<entry>
<title>openrisc: Add prototype for show_registers to processor.h</title>
<updated>2023-08-21T07:15:18+00:00</updated>
<author>
<name>Stafford Horne</name>
<email>shorne@gmail.com</email>
</author>
<published>2023-08-20T16:11:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8d4a142904f07765b7c7c46abf71f811a0811987'/>
<id>urn:sha1:8d4a142904f07765b7c7c46abf71f811a0811987</id>
<content type='text'>
When compiling with W=1 enabling -Wmissing-prototypes the compiler
warns:

  arch/openrisc/kernel/traps.c:67:6: error: no previous prototype for 'show_registers' [-Werror=missing-prototypes]

Fix by adding the prototype to the appropriate header file and including
the header file in the appropriate C files.

Reported-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Closes: https://lore.kernel.org/linux-kernel/20230810141947.1236730-17-arnd@kernel.org/
Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
</content>
</entry>
</feed>
