kernel/linux.git/arch/mips/include/asm/octeon, branch linux-4.4.y

MIPS: Octeon: Fix build errors using clang

2022-01-27T07:46:19+00:00

[ Upstream commit 95339b70677dc6f9a2d669c4716058e71b8dc1c7 ] A large number of the following errors is reported when compiling with clang: cvmx-bootinfo.h:326:3: error: adding 'int' to a string does not append to the string [-Werror,-Wstring-plus-int] ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NULL) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ cvmx-bootinfo.h:321:20: note: expanded from macro 'ENUM_BRD_TYPE_CASE' case x: return(#x + 16); /* Skip CVMX_BOARD_TYPE_ */ ~~~^~~~ cvmx-bootinfo.h:326:3: note: use array indexing to silence this warning cvmx-bootinfo.h:321:20: note: expanded from macro 'ENUM_BRD_TYPE_CASE' case x: return(#x + 16); /* Skip CVMX_BOARD_TYPE_ */ ^ Follow the prompts to use the address operator '&' to fix this error. Signed-off-by: Tianjia Zhang Reviewed-by: Nathan Chancellor Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Thomas Bogendoerfer Signed-off-by: Sasha Levin

MIPS: OCTEON: cvmx_pko_mem_debug8: use oldest forward compatible definition

2019-12-21T09:34:45+00:00

[ Upstream commit 1c6121c39677175bd372076020948e184bad4b6b ] cn58xx is compatible with cn50xx, so use the latter. Signed-off-by: Aaro Koskinen [paul.burton@mips.com: s/cn52xx/cn50xx/ in commit message.] Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: linux-mips@vger.kernel.org Signed-off-by: Sasha Levin

MIPS: Octeon: Fix management port MII address on Kontron S1901

2015-09-03T10:08:11+00:00

Management port MII address is incorrect on Kontron S1901 resulting in broken networking. Fix by providing definitions for the in-tree DT pruning code. Signed-off-by: Aaro Koskinen Acked-by: David Daney Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10914/ Signed-off-by: Ralf Baechle

MIPS: Octeon: Set up 1:1 mapping between CN68XX PKO queues and ports

2015-09-03T10:08:10+00:00

Use the internal port number also as the queue number on CN68XX. Signed-off-by: Janne Huttunen Signed-off-by: Aaro Koskinen Acked-by: David Daney Cc: David Daney Cc: linux-mips@linux-mips.org Cc: Janne Huttunen Cc: Aaro Koskinen Cc: Greg Kroah-Hartman Cc: devel@driverdev.osuosl.org Patchwork: https://patchwork.linux-mips.org/patch/10962/ Signed-off-by: Ralf Baechle

STAGING: Octeon: Support CN68XX style WQE

2015-09-03T10:08:10+00:00

CN68XX has a bit different WQE structure. This patch provides the new definitions and converts the code to use the proper variant based on the actual model. Signed-off-by: Janne Huttunen Signed-off-by: Aaro Koskinen Acked-by: David Daney Cc: David Daney Cc: linux-mips@linux-mips.org Cc: Janne Huttunen Cc: Aaro Koskinen Cc: Greg Kroah-Hartman Cc: devel@driverdev.osuosl.org Patchwork: https://patchwork.linux-mips.org/patch/10973/ Signed-off-by: Ralf Baechle

MIPS: Octeon: Add definitions for setting up SSO

2015-09-03T10:08:09+00:00

Some Octeon II models have SSO instead of POW and use a different register for setting the interrupt thresholds. Add the necessary definitions for configuring the interrupts also on those models. Signed-off-by: Janne Huttunen Signed-off-by: Aaro Koskinen Acked-by: David Daney Cc: David Daney Cc: linux-mips@linux-mips.org Cc: Janne Huttunen Cc: Aaro Koskinen Cc: Greg Kroah-Hartman Cc: devel@driverdev.osuosl.org Patchwork: https://patchwork.linux-mips.org/patch/10972/ Signed-off-by: Ralf Baechle

MIPS: Octeon: Support all PIP input ports on CN68XX

2015-09-03T10:08:08+00:00

CN68XX has 48 PIP input ports. Signed-off-by: Janne Huttunen Signed-off-by: Aaro Koskinen Acked-by: David Daney Cc: David Daney Cc: linux-mips@linux-mips.org Cc: Janne Huttunen Cc: Aaro Koskinen Cc: Greg Kroah-Hartman Cc: devel@driverdev.osuosl.org Patchwork: https://patchwork.linux-mips.org/patch/10969/ Signed-off-by: Ralf Baechle

Merge branch '4.0-fixes' into mips-for-linux-next

2015-04-13T14:03:32+00:00

MIPS: Octeon: Remove udelay() causing huge IRQ latency

2015-04-10T13:41:42+00:00

udelay() in PCI/PCIe read/write callbacks cause 30ms IRQ latency on Octeon platforms because these operations are called from PCI_OP_READ() and PCI_OP_WRITE() under raw_spin_lock_irqsave(). Signed-off-by: Alexander Sverdlin Cc: linux-mips@linux-mips.org Cc: David Daney Cc: Rob Herring Cc: Jiri Kosina Cc: Randy Dunlap Cc: Masanari Iida Cc: Bjorn Helgaas Cc: Mathias Patchwork: https://patchwork.linux-mips.org/patch/9576/ Signed-off-by: Ralf Baechle

MIPS: Octeon: Reverse the order of register accesses to the FAU

2015-04-01T15:22:14+00:00

64 bit access is unaffected but for 32 bit access, swap high and low words. Similarly for 16 bit access, reverse the order of the four possible words, and for 8 bit access reverse the order of byte accesses. Signed-off-by: Paul Martin Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9630/ Signed-off-by: Ralf Baechle