kernel/linux.git/arch/mips/include/asm/mipsregs.h, branch linux-7.0.y

MIPS: Always record SEGBITS in cpu_data.vmbits

2026-04-01T19:53:50+00:00

With a 32-bit kernel running on 64-bit MIPS hardware the hardcoded value of `cpu_vmbits' only records the size of compatibility useg and does not reflect the size of native xuseg or the complete range of values allowed in the VPN2 field of TLB entries. An upcoming change will need the actual VPN2 value range permitted even in 32-bit kernel configurations, so always include the `vmbits' member in `struct cpuinfo_mips' and probe for SEGBITS when running on 64-bit hardware and resorting to the currently hardcoded value of 31 on 32-bit processors. No functional change for users of `cpu_vmbits'. Signed-off-by: Maciej W. Rozycki Signed-off-by: Thomas Bogendoerfer

mips: Replace ASSEMBLY with ASSEMBLER in the mips headers

2025-08-29T20:34:29+00:00

While the GCC and Clang compilers already define __ASSEMBLER__ automatically when compiling assembler code, __ASSEMBLY__ is a macro that only gets defined by the Makefiles in the kernel. Defining such a macro was necessary in the early days of the kernel, since GCC only started providing __ASSEMBLER__ since version 3.0 in 2000 (see https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=f8f769ea4e69 ). However, having two macros can be very confusing nowadays for the developers when switching between userspace and kernelspace coding, or when dealing with uapi headers that should use __ASSEMBLER__ instead. So let's now standardize on the __ASSEMBLER__ macro that is provided by the compilers. This is almost a completely mechanical patch (done with a simple "sed -i" statement), with just one comment tweaked manually in arch/mips/include/asm/cpu.h (that was missing some underscores). Cc: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Maciej W. Rozycki Signed-off-by: Thomas Huth Signed-off-by: Thomas Bogendoerfer

MIPS: kernel: Rename read/write_c0_ecc to read/writec0_errctl

2025-01-11T11:31:21+00:00

CP0 register 26 is used as ECC register for legacy cores, but newer cores (MIPS32/MIPS64) use it as an ErrCtl register. Since the kernel only uses CP0 26 as ErrCtl register rename the access functions to the more fitting name. Signed-off-by: Thomas Bogendoerfer Reviewed-by: Maciej W. Rozycki Signed-off-by: Thomas Bogendoerfer

MIPS: mipsregs: Parse fp and sp register by name in parse_r

2024-02-28T11:25:52+00:00

parse_r helper is used to parse register number from oprand, it only handles oprand which use number to refer register before. However compiler may use $gp and $sp to reference register 29 and 30. Handle this situation by adding relevant match name. Fixes compilation error: {standard input}: Assembler messages: {standard input}:1937: Error: Unable to parse register name $fp Signed-off-by: Jiaxun Yang Signed-off-by: Thomas Bogendoerfer

MIPS: mipsregs: Set proper ISA level for virt extensions

2024-02-23T09:13:48+00:00

c994a3ec7ecc ("MIPS: set mips32r5 for virt extensions") setted some instructions in virt extensions to ISA level mips32r5. However TLB related vz instructions was leftover, also this shouldn't be done to a R5 or R6 kernel buid. Reorg macros to set ISA level as needed when _ASM_SET_VIRT is called. Signed-off-by: Jiaxun Yang Signed-off-by: Thomas Bogendoerfer

MIPS: Implement microMIPS MT ASE helpers

2024-02-23T09:13:47+00:00

Implement various microMIPS MT ASE helpers accroading to: MIPS® Architecture for Programmers Volume IV-f: The MIPS® MT Module for the microMIPS32™ Architecture Fixes build error: {standard input}:2616: Error: branch to a symbol in another ISA mode This make MT ASE available on microMIPS as well. Boot tested on M5150 with microMIPS enabled on M5150. Signed-off-by: Jiaxun Yang Signed-off-by: Thomas Bogendoerfer

MIPS: Unify define of CP0 registers for uasm code

2024-02-20T11:41:51+00:00

Definitions of uasm variant of CP0 registers are unified to mipsregs.h, so they lay together with uasm variant of the code. Signed-off-by: Jiaxun Yang Signed-off-by: Thomas Bogendoerfer

MIPS: Fix typos

2024-01-08T09:39:12+00:00

Fix typos, most reported by "codespell arch/mips". Only touches comments, no code changes. Signed-off-by: Bjorn Helgaas Cc: linux-mips@vger.kernel.org Reviewed-by: Randy Dunlap Signed-off-by: Thomas Bogendoerfer

MIPS: Always use -Wa,-msoft-float and eliminate GAS_HAS_SET_HARDFLOAT

2023-01-26T03:41:16+00:00

-Wa,-msoft-float is tested with as-option, which will be a problem for clang with an upcoming change to move as-option to use KBUILD_AFLAGS instead of KBUILD_CFLAGS due to a lack of '-mno-abicalls' in KBUILD_AFLAGS at the point that this check occurs; $(cflags-y) is added to KBUILD_AFLAGS towards the end of this file. clang: error: ignoring '-fno-PIE' option as it cannot be used with implicit usage of -mabicalls and the N64 ABI [-Werror,-Woption-ignored] This could be resolved by switching to a cc-option check but '$(cflags-y)' would need to be added so that '-mno-abicalls' is present for the test. However, this check is no longer necessary, as -msoft-float is supported by all supported assembler versions (GNU as 2.25+ and LLVM 11+). Eliminate GAS_HAS_SET_HARDFLOAT and all of its uses, inlining SET_HARDFLOAT where necessary. Link: https://lore.kernel.org/202209101939.bvk64Fok-lkp@intel.com/ Reported-by: kernel test robot Signed-off-by: Nathan Chancellor Acked-by: Thomas Bogendoerfer Reviewed-by: Nick Desaulniers Reviewed-by: Philippe Mathieu-Daudé Tested-by: Linux Kernel Functional Testing Tested-by: Anders Roxell Signed-off-by: Masahiro Yamada

MIPS: Remove VR41xx support

2022-07-14T09:52:29+00:00

No (active) developer owns this hardware, so let's remove Linux support. Signed-off-by: Thomas Bogendoerfer